- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 29 3月, 2011 2 次提交
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由 Thomas Gleixner 提交于
Convert to the new function names. Scripted with coccinelle. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org
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由 Thomas Gleixner 提交于
Use the trigger type in irq_data and check level type instead of looking at desc->handle_irq. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: uclinux-dist-devel@blackfin.uclinux.org
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- 23 3月, 2011 1 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 18 3月, 2011 17 次提交
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由 Mike Frysinger 提交于
Hook up name_to_handle_at, open_by_handle_at, and clock_adjtime. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Philippe Gerum 提交于
This patch makes sure to sync the pipeline for the root stage only from the outer interrupt level, when resuming kernel code after an interrupt. This fixes a bug causing EVT15 to be spuriously popped off upon nested interrupts, which in turn would cause the preempted kernel code to resume without supervisor privileges. Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Philippe Gerum 提交于
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: NPhilippe Gerum <rpm@xenomai.org> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Michael Hennerich 提交于
No functional changes here. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Thomas Gleixner 提交于
Fixup the open coded access to irq_desc and use the proper wrappers. Signed-off-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Take advantage of more Blackfin-specific insns, and only initialize registers required by the ABI. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Sonic Zhang 提交于
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
We need to place icache flush funcs into L1 inst sram to work around a hardware anomaly. But this currently breaks SMP support as the L1 inst sram is per-core and cannot be called directly. So in preparation for making that work, split the two options. Further, split out the SMP depend so that we can allow some for SMP. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Sonic Zhang 提交于
The smp_processor_id() API requires that preempt be disabled when calling it, so make sure it is when we go to send messages to other processors. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 steven miao 提交于
Defer bfin_setup_caches(cpu) to avoid unexpected faults due to the cpu state not yet being fully initialized. Signed-off-by: Nsteven miao <realmz6@gmail.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 04 3月, 2011 1 次提交
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由 Mike Frysinger 提交于
Recent feedback from design says we need three NOPs in the hardware loop. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 10 1月, 2011 6 次提交
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由 Mike Frysinger 提交于
When unmasking a GPIO interrupt on a BF54x part, the code will implicitly ack any pending interrupts. This is not what unmasking should do and can cause people to miss interrupts from their devices, so punt the code. Reported-by: NRutger Hofman <rutger@cs.vu.nl> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
The low level assembly needs to use the pseudo_long_call helper so that we use the right call insn when doing kernel XIP. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Steven Miao 提交于
Since linux-2.6.31, the kernel suspend framework will do disable_irq/enable_irq, so save/restore irq in standby and suspend to mem callback should be dropped. Otherwise the common code notices things are enabled and complains. Signed-off-by: NSteven Miao <realmz6@gmail.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Yi Li 提交于
Currently, sending an interprocessor interrupt (IPI) requires building up a message dynamically which means memory allocation. But often times, we will want to send an IPI in low level contexts where allocation is not possible which may lead to a panic(). So create a per-cpu static array for the message queue and use that instead. Further, while we have two supplemental interrupts, we are currently only using one of them. So use the second one for the most common IPI message of all -- smp_send_reschedule(). This avoids ugly contention for locks which in turn would require an IPI message ... In general, this improves SMP performance, and in some cases allows the SMP port to work in places it wouldn't before. Such as the PREEMPT_RT state where the slab is protected by a per-cpu spin lock. If the slab kmalloc/kfree were to put the task to sleep, and that task was actually the IPI handler, then the system falls down yet again. After running some various stress tests on the system, the static limit of 5 messages seems to work. On the off chance even this overflows, we simply panic(), and we can review that scenario to see if the limit needs to be increased a bit more. Signed-off-by: NYi Li <yi.li@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
This function takes an irq_handler_t function, but the prototype in the header doesn't match the function definition. This is due to the smp headers needing to avoid circular dependencies. So change the function to take a simple pointer. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Graf Yang 提交于
The cpu maps are defines provided by common linux/cpumask.h, not local variables. So stop exporting them locally and include the right header for their definition. Signed-off-by: NGraf Yang <graf.yang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 16 11月, 2010 1 次提交
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由 Lionel Debroux 提交于
While at it, fix two checkpatch errors. Several non-const struct instances constified by this patch were added after the introduction of platform_suspend_ops in checkpatch.pl's list of "should be const" structs (79404849). Patch against mainline. Inspired by hunks of the grsecurity patch, updated for newer kernels. Signed-off-by: NLionel Debroux <lionel_debroux@yahoo.fr> Acked-by: NIngo Molnar <mingo@elte.hu> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 26 10月, 2010 1 次提交
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由 Mike Frysinger 提交于
This code was useful during early port development when our icache code wasn't solid, but that ship has sailed long ago, and no code calls this function anymore (irq_panic). So punt it. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 23 10月, 2010 1 次提交
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由 Mike Frysinger 提交于
This matches all the other Blackfin ports and keep us from having to write bf561-specific code in many places. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 22 10月, 2010 3 次提交
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由 Sonic Zhang 提交于
Flushing caches sometimes requires anomaly workarounds which require supervisor-only insns. Normally we don't need to flush caches from userspace so this isn't a problem, but when gcc generates trampolines on the stack, we do. So add a new syscall for gcc to use modeled after the mips version. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Michael Hennerich 提交于
Make sure we include EMAC_SYSTAT when showing errors. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Barry Song 提交于
Signed-off-by: NBarry Song <barry.song@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 07 10月, 2010 1 次提交
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由 David Howells 提交于
Rename h/w IRQ flags handling functions to be in line with what is expected for the irq renaming patch. This renames local_*_hw() to hard_local_*() using the following perl command: perl -pi -e 's/local_irq_(restore|enable|disable)_hw/hard_local_irq_\1/ or s/local_irq_save_hw([_a-z]*)[(]flags[)]/flags = hard_local_irq_save\1()/' `find arch/blackfin/ -name "*.[ch]"` and then fixing up asm/irqflags.h manually. Additionally, arch/hard_local_save_flags() and arch/hard_local_irq_save() both return the flags rather than passing it through the argument list. Signed-off-by: NDavid Howells <dhowells@redhat.com>
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- 23 8月, 2010 1 次提交
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由 Mike Frysinger 提交于
Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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- 07 8月, 2010 4 次提交
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由 Michael Hennerich 提交于
The RTC ISTAT bits do not affect wakeups, and the RTC driver already takes care of clearing this MMR when necessary. So drop the useless clearing in the core Blackfin power code. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Michael Hennerich 提交于
The dma_memcpy() function takes care of flushing different caches for us. Normally this is what we want, but when resuming from mem, we don't yet have caches enabled. If these functions happen to be placed into L1 mem (which is what we're trying to relocate), then things aren't going to work. So define a non-cache dma_memcpy() variant to utilize in situations like this. Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com> Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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由 Mike Frysinger 提交于
Anomaly 05000491 says that IFLUSH cannot have certain types of memory stalls triggered before it has completed in order to function correctly. One such condition is that it be in L1 instruction. So add a config option to move it there, default it to on, and throw up a warning when it is turned off and this anomaly exists. Since the anomaly should be worked around, we can drop the older method of calling IFLUSH multiple times. Signed-off-by: NMike Frysinger <vapier@gentoo.org> Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
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由 Mike Frysinger 提交于
Design found that these anomalies had the same root issue, so they've merged 475 into 220. We need to do the same to update to the latest anomaly sheets. Signed-off-by: NMike Frysinger <vapier@gentoo.org>
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