- 30 8月, 2013 1 次提交
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由 Barry Song 提交于
the series of patches for irqdomain core in 3.11 has broken sirf irq which uses legacy mapping. all users fail in the new kernel while setupping irq. this patch moves to linear irqdomain and drop old legacy irqdomain codes since we don't need it any more, and at the same time, it also fixes the broken interrupts of sirfsoc in 3.11. on the other hand, we actually only have 64 interrupt sources for prima2 and atlas6, but there are 128 interrupt souces for marco which uses GIC. in the legacy codes, sirf gpio also uses legacy irqdomain, so to make gpio interrupt mapping not depend on the prima2/atlas6/marco an use unified marco,we enlarge prima2/atlas6 interrupt number to 128. here we don't need this workaround any more as sirf gpio also moved to linear mode before. so we move SIRFSOC_NUM_IRQS back to 64 too. Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 29 8月, 2013 1 次提交
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由 Nicolas Pitre 提交于
When processors are about to hit low power states, the assertion of standbywfi signal, triggered by the wfi instruction, is essential to entering low power modes. If an IRQ is pending on the processor at the time wfi is issued, the wfi instruction completes and the processor restarts execution without asserting the standbywfi signal. Depending on the platform power controller HW this behaviour can be acceptable or not; if this behaviour must be prevented software should be provided with a way to disable the routing of interrupts to the core IRQ pins. On systems where raw GIC distributor interrupts are connected to the power controller as wake-up events (hence the power controller still senses IRQs and can wake up cores upon IRQ pending), the GIC CPU interface can be disabled on power down, so that the GIC CPU IF output is gated and wfi cannot complete, thereby preventing the standbywfi issue. This patch adds a simple function to the GIC driver that allows to disable the GIC CPU IF from power down procedures. Signed-off-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com> [rewrote commit log] Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 21 8月, 2013 1 次提交
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由 James Hogan 提交于
Add irqchip driver for the ImgTec PowerDown Controller (PDC) as found in the TZ1090. The PDC has a number of general system wakeup (SysWake) interrupts (which would for example be connected to a power button or an external peripheral), and a number of peripheral interrupts which can also wake the system but are connected straight to specific low-power peripherals (such as RTC or Infrared). It has a single interrupt output for SysWakes, and individual interrupt outputs for each peripheral. The driver demuxes the SysWake interrupt line, and passes the peripheral interrupts straight through. It also handles the set_wake interrupt operation to enable/disable the appropriate wake event bits. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Reviewed-by: NThomas Gleixner <tglx@linutronix.de> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: linux-metag@vger.kernel.org Cc: linux-doc@vger.kernel.org Cc: devicetree-discuss@lists.ozlabs.org
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- 16 7月, 2013 1 次提交
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由 Kukjin Kim 提交于
For EXYNOS SoCs, only can support for DT so removes non-DT stuff in exynos-combiner. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 15 7月, 2013 1 次提交
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由 Paul Gortmaker 提交于
The __cpuinit type of throwaway sections might have made sense some time ago when RAM was more constrained, but now the savings do not offset the cost and complications. For example, the fix in commit 5e427ec2 ("x86: Fix bit corruption at CPU resume time") is a good example of the nasty type of bugs that can be created with improper use of the various __init prefixes. After a discussion on LKML[1] it was decided that cpuinit should go the way of devinit and be phased out. Once all the users are gone, we can then finally remove the macros themselves from linux/init.h. This removes all the drivers/clocksource and drivers/irqchip uses of the __cpuinit macros from all C files. [1] https://lkml.org/lkml/2013/5/20/589 Cc: John Stultz <john.stultz@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 05 7月, 2013 4 次提交
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由 Jonas Jensen 提交于
This patch adds an irqchip driver for the main interrupt controller found on MOXA ART SoCs. Signed-off-by: NJonas Jensen <jonas.jensen@gmail.com> Cc: grant.likely@secretlab.ca Cc: thomas.petazzoni@free-electrons.com Cc: arnd@arndb.de Cc: u.kleine-koenig@pengutronix.de Cc: linux@arm.linux.org.uk Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1372941531-6393-1-git-send-email-jonas.jensen@gmail.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Axel Lin 提交于
The third parameter of irq_alloc_domain_generic_chips() is the number of irq_chip_type instances associated with these chips rather than numbanks. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Cc: Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: kernel@pengutronix.de Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Axel Lin 提交于
sun4i_irq_ack() is only referenced in this file, so make it static. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com> Link: http://lkml.kernel.org/r/1373010070.14756.2.camel@phoenixSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Axel Lin 提交于
This driver is converted to use IRQCHIP_DECLARE and irqchip_init. vt8500_handle_irq() and vt8500_irq_init() are only referenced in this file, so make them static. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NTony Prisk <linux@prisktech.co.nz> Cc: Olof Johansson <olof@lixom.net> Link: http://lkml.kernel.org/r/1372995229.4038.1.camel@phoenixSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 28 6月, 2013 1 次提交
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由 Sachin Kamat 提交于
combiner_init() is referenced only in this file. Make it static. Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kgene.kim@samsung.com Cc: t.figa@samsung.com Cc: arnd@arndb.de Cc: patches@linaro.org Link: http://lkml.kernel.org/r/1372246597-32323-2-git-send-email-sachin.kamat@linaro.orgSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 26 6月, 2013 2 次提交
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由 Uwe Kleine-König 提交于
This interrupt controller is integrated in all Cortex-M3 and Cortex-M4 machines. Support for this controller appeared in Catalin's Cortex tree based on 2.6.33 but was nearly completely rewritten. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Cc: linux-arm-kernel@lists.infradead.org Cc: Jonathan Austin <jonathan.austin@arm.com> Cc: kernel@pengutronix.de Link: http://lkml.kernel.org/r/1372231128-11802-1-git-send-email-u.kleine-koenig@pengutronix.deSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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由 Christian Ruppert 提交于
The SOC interrupt controller driver for the Abilis Systems TB10x series of SOCs based on ARC700 CPUs. Signed-off-by: NChristian Ruppert <christian.ruppert@abilis.com> Signed-off-by: NPierrick Hascoet <pierrick.hascoet@abilis.com> Cc: Vineet Gupta <Vineet.Gupta1@synopsys.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: devicetree-discuss@lists.ozlabs.org Link: http://lkml.kernel.org/r/1372177797-9458-1-git-send-email-christian.ruppert@abilis.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 20 6月, 2013 1 次提交
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由 Shawn Guo 提交于
Commit c0114709 (irqchip: gic: Perform the gic_secondary_init() call via CPU notifier) moves gic_secondary_init() that used to be called in .smp_secondary_init hook into a notifier call. But it changes the system behavior a little bit. Before the commit, gic_cpu_init() is called not only when kernel brings up the secondary cores but also when system resuming procedure hot-plugs the cores back to kernel. While after the commit, the function will not be called in the latter case, where the 'action' will not be CPU_STARTING but CPU_STARTING_FROZEN. This behavior difference at least causes the following suspend/resume regression on imx6q. $ echo mem > /sys/power/state PM: Syncing filesystems ... done. PM: Preparing system for mem sleep mmc1: card e624 removed Freezing user space processes ... (elapsed 0.01 seconds) done. Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done. PM: Entering mem sleep PM: suspend of devices complete after 5.930 msecs PM: suspend devices took 0.010 seconds PM: late suspend of devices complete after 0.343 msecs PM: noirq suspend of devices complete after 0.828 msecs Disabling non-boot CPUs ... CPU1: shutdown CPU2: shutdown CPU3: shutdown Enabling non-boot CPUs ... CPU1: Booted secondary processor INFO: rcu_sched detected stalls on CPUs/tasks: { 1 2 3} (detected by 0, t=2102 jiffies, g=4294967169, c=4294967168, q=17) Task dump for CPU 1: swapper/1 R running 0 0 1 0x00000000 Backtrace: [<bf895ff4>] (0xbf895ff4) from [<00000000>] ( (null)) Backtrace aborted due to bad frame pointer <8007ccdc> Task dump for CPU 2: swapper/2 R running 0 0 1 0x00000000 Backtrace: [<8075dbdc>] (0x8075dbdc) from [<00000000>] ( (null)) Backtrace aborted due to bad frame pointer <00000002> Task dump for CPU 3: swapper/3 R running 0 0 1 0x00000000 Backtrace: [<8075dbdc>] (0x8075dbdc) from [<00000000>] ( (null)) Fix the regression by checking 'action' being CPU_STARTING_FROZEN to have gic_cpu_init() called for secondary cores when system resumes. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 19 6月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
To disable spurious interrupts, that get triggered on certain hardware, the irqpin driver masks them on the parent interrupt controller. To specify such broken devices a .control_parent parameter can be provided in the platform data. In the DT case we need a property, to do the same. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de> Acked-by: NMagnus Damm <damm@opensource.se> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 18 6月, 2013 1 次提交
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由 Guennadi Liakhovetski 提交于
Most Renesas irqpin controllers have 4-bit sense fields, however, some have different widths. This patch adds a DT binding to optionally specify such non-standard values. Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski+renesas@gmail.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 11 6月, 2013 1 次提交
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由 Sebastian Hesselbarth 提交于
This patch adds an irqchip driver for the main interrupt controller found on Marvell Orion SoCs (Kirkwood, Dove, Orion5x, Discovery Innovation). Corresponding device tree documentation is also added. Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Acked-by: NGrant Likely <grant.likely@linaro.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: John Stultz <john.stultz@linaro.org> Cc: Russell King <linux@arm.linux.org.uk> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Lunn <andrew@lunn.ch> Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Cc: Gregory Clement <gregory.clement@free-electrons.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-arm-kernel@lists.infradead.org Link: http://lkml.kernel.org/r/1370536034-23956-2-git-send-email-sebastian.hesselbarth@gmail.comSigned-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 09 6月, 2013 1 次提交
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由 Grant Likely 提交于
The irqdomain core will report a log message for any attempted map call that fails unless the error code is -EPERM. This patch changes the Versatile irq controller drivers to use -EPERM because it is normal for a subset of the IRQ inputs to be marked as reserved on the various Versatile platforms. Signed-off-by: NGrant Likely <grant.likely@linaro.org>
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- 06 6月, 2013 1 次提交
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由 Axel Lin 提交于
The code in goto err3 path is wrong because it will call fee_irq() with k == 0, which means it does free_irq(p->irq[-1].requested_irq, &p->irq[-1]); Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NSimon Horman <horms+renesas@verge.net.au>
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- 03 6月, 2013 1 次提交
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由 Markus Pargmann 提交于
The mxs interrupt controller does not support polling for interrupts, but the driver still does it, which is a relict from pre-MULTI_IRQ_HANDLER times. The existing code assumes that 0x7f means no interrupt, but this value is an actually valid irq number, namely gpio bank 0's irq. This results in the driver not detecting when irq 0x7f is active which makes the machine effectively dead lock. This patch removes the interrupt poll loop and allows usage of gpio0 interrupt without an infinite loop. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NMarkus Pargmann <mpa@pengutronix.de> Cc: stable@vger.kernel.org Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
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- 29 4月, 2013 1 次提交
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由 Arnd Bergmann 提交于
The s3c24xx_init_intc and s3c2412_init_irq functions are only called at init time, and they call functions already marked __init, so they should be marked in the same way. This was reported as WARNING: vmlinux.o(.text+0x19e0b4): Section mismatch in reference from the function s3c2412_init_irq() to the function .init.text:s3c24xx_init_intc.constprop.8() The function s3c2412_init_irq() references the function __init s3c24xx_init_intc.constprop.8(). This is often because s3c2412_init_irq lacks a __init annotation or the annotation of s3c24xx_init_intc.constprop.8 is wrong. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NHeiko Stuebner <heiko@sntech.de> Cc: Kukjin Kim <kgene.kim@samsung.com>
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- 20 4月, 2013 5 次提交
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由 Arnd Bergmann 提交于
Since we want to move to using the linear IRQ domain in the future, we cannot rely on the irq numbers to be contiguous and need to look up the irq from the hwirq using the domain. This also turns the bogus comparison with NR_IRQ into a more meaningful check to see if the number has a valid mapping. Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Arnd Bergmann 提交于
The platform code knows the IRQ base, while the irqchip driver should really not. This is a littly hacky because we still hardwire the IRQ base to 160 for the combiner in the DT case, when we should really use -1. Removing that line will cause a linear IRQ domain to be use, as we should. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Arnd Bergmann 提交于
The IRQ_SPI() macro is not available in the driver when building with sparse IRQs or multiplatform, so let's move all users of this into one function that we can leave out when building DT-only. Signed-off-by: NArnd Bergmann <arnd@arnd.de> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Arnd Bergmann 提交于
The number of combiners on a given SoC is a platform specific constant, and we cannot encode this number on a multiplatform kernel since the header file defining it is not available. Allocating the structure dynamically ends up cleaner anyway since we keep all the data local. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
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由 Arnd Bergmann 提交于
We can find out the number of combined IRQs from the device tree, but in case of ATAGS boot, the driver currently uses hardcoded values based on the SoC type. We can't do that in general for a multiplatform kernel, so let's instead pass this information from platform code directly in case of ATAGS boot. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Cc: Thomas Gleixner <tglx@linutronix.de>
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- 16 4月, 2013 3 次提交
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由 Thomas Petazzoni 提交于
In preparation for the introduction of MSI support in the IRQ controller driver, we clarify the implementation of IPI using additional defines for the manipulation of doorbells. Just like IPIs are implemented using doorbells, MSIs will also use doorbells, so it makes sense to do this preparatory cleanup first. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
If we move the IRQ handler function above the initialization function, we avoid a forward declaration. This wasn't done as part of the previous commit, in order to increase the readibility of the previous commit, who was also moving the IRQ controller driver from arch/arm to drivers/irqchip. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Thomas Petazzoni 提交于
When the Marvell Armada 370/XP support was included in the kernel, the drivers/irqchip/ directory didn't exist and the minimal infrastructure in it also didn't exist. Now that we have those things in place, we move the Armada 370/XP IRQ controller driver from arch/arm/mach-mvebu/irq-armada-370-xp.c to drivers/irqchip/irq-armada-370-xp.c. Note in order to reduce code movement and therefore ease the review of this patch, we intentionally introduce a forward declaration of armada_370_xp_handle_irq(). It is in fact not needed because this handler can now simply be implemented before armada_370_xp_mpic_of_init(). That will be done in the next commit. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Tested-by: NEzequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 13 4月, 2013 1 次提交
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由 Tony Prisk 提交于
This patch moves the arch-vt8500 irq code to drivers/irqchip and converts it to use the new IRQCHIP_DECLARE and irqchip_init. This allows the removal of some more functions from common.h Signed-off-by: NTony Prisk <linux@prisktech.co.nz> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 09 4月, 2013 4 次提交
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由 Maxime Ripard 提交于
During the introduction of the Allwinner SoC platforms, sunxi was initially meant as a generic name for all the variants of the Allwinner SoC. It was ok at the time of the support of only the A10 and A13 that looks pretty much the same, but it's beginning to be troublesome with the future addition of the Allwinner A31 (sun6i) that is quite different, and would introduce some weird logic, where sunxi would actually mean in some case sun4i and sun5i but without sun6i... Moreover, it makes the compatible strings naming scheme not consistent with other architectures, where usually for this kind of compability, we just use the oldest SoC name that has this IP, so let's do just this. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Maxime Ripard 提交于
This allows to remove some boilerplate code. At the same time, call the set_handle_irq function in the initialization function of the irqchip, so that we can remove it from the machine declaration. Signed-off-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
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由 Chanho Park 提交于
This patch corrects combined IRQs for exynos4 series platform. The exynos4412 has four extra combined irq group and the exynos4212 has two more combined irqs than exynos4210. Each irq is mapped to IRQ_SPI(xx). Unfortunately, extra 4 combined IRQs isn't sequential. So, we need to map the irqs manually. Signed-off-by: NChanho Park <chanho61.park@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: changes moved into drivers/irqchip/] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Chanho Park 提交于
This patch adds set_irq_affinity function for combiner_irq. We need this function to enable a arm-pmu because the pmu of exynos has combined type irqs. Reviewed-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NChanho Park <chanho61.park@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> [kgene.kim@samsung.com: changes moved into drivers/irqchip/] Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 04 4月, 2013 7 次提交
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由 Heiko Stuebner 提交于
Add the necessary code to initialize the interrupt controller thru devicetree data using the irqchip infrastructure. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
Keep a pointer to the corresponding s3c_irq_data struct as irq_chip_data. This removes the need to fetch the intc struct from the irq_domains host_data, thus making it independent of the underlying irq_domain structure. Also keep the real register offset of the interrupt in the s3c_irq_data struct to make it independent of the hwirq structure in the irq_domain Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
For dt-enabled machines we want to use a big irq_domain over all controllers and therefore need to access not only the main controllers but the sub-controller as well. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
Enables post-init setting of the desired typehandler for the interrupt. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
The list in used was from the s3c2450, a close cousin of the s3c2416. As it's not possible to distinguish between the s3c2416 and s3c2450 the additional interrupts of the s3c2450 will only be available thru devicetree later. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
Might be confusing for people to read the code without having the datasheet nearby. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Heiko Stuebner 提交于
This move is necessary to make use of the irqchip infrastructure for the following devicetree support for s3c24xx architectures. Signed-off-by: NHeiko Stuebner <heiko@sntech.de> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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