Today we mix pdata and drivers data in the struct atmel_lcdfb_info
Fix it and introduce a new struct atmel_lcdfb_pdata for platform data only
Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com>

Both at91 and avr32 defines its own platform data structure for
the macb driver and both share common structures though at91
includes a currently unused phy_irq_pin.  Create a common
macb_platform_data for macb that both at91 and avr32 can use.  In
future we can use this to support other architectures that use the
same IP block with the macb driver.

v2: rename eth_platform_data to macb_platform_data and allow at91_ether
to share the platform data with macb.
Signed-off-by: NJamie Iles <jamie@jamieiles.com>
Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com>
Tested-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>

clk_get() returns ERR_PTR() on error, not NULL.
Signed-off-by: NVasiliy Kulikov <segoon@openwall.com>
Acked-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>

Adds extra parameter to AT32 at32_map_usart(), so as to reserve
RTS/CTS/CLK pins.

All boards under arch/avr32/boards have been updated (trivial change), but
not all have been tested.
Signed-off-by: NPeter Ma <pma@mediamatech.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch will adjust the setup the DMA controller for the AC97
Controller in the at32ap700x machine code. This setup matches the new
ALSA driver for the AC97C.

The struct ac97c_platform_data has been moved into its own header file
located in the sound include path.

Tested on ATSTK1006 + ATSTK1000.

This patch will setup the AC97 controller properly for the adjusted
machine code. Both EVKLCD10x and Hammerhead board has been updated.

Tested on EVKLCD10x, and copied to Hammerhead board.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
[haavard.skinnemoen@atmel.com: fold with board code update]
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

at32_add_device_mci() will refuse to add the mci device if the data
parameter is NULL. Fix up the favr-32 and hammerhead boards so that this
doesn't happen.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Cc: Alex Raimondi <mailinglist@miromico.ch>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>

The Hammerhead platform is built around a AVR32 32-bit microcontroller
from Atmel.  It offers versatile peripherals, such as ethernet, usb
device, usb host etc.

The board also incooperates a power supply and is a Power over Ethernet
(PoE) Powered Device (PD).

Additonally, a Cyclone III FPGA from Altera is integrated on the board.
The FPGA is mapped into the 32-bit AVR memory bus. The FPGA offers two
DDR2 SDRAM interfaces, which will cover even the most exceptional need
of memory bandwidth. Together with the onboard video decoder the board
is ready for video processing.

This patch does include the basic support for the fpga device driver,
but not the device driver itself.
Signed-off-by: NAlex Raimondi <mailinglist@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch removes a call to the deprecated function
at32_add_system_devices().
Signed-off-by: NMark Jackson <mpfj@mimc.co.uk>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Please consider the following patch which adds support for a new AVR32
based board.

The board is closely based on Atmel's NGW100 reference board, but has an
extra 8MByte FLASH and 128KByte FRAM.
Signed-off-by: NMark Jackson <mpfj@mimc.co.uk>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This patch lets the user enable support for EVKLCD100 and EVKLCD101
(refered to by EVKLCD10X). By enabling EVKLCD10X support the LCD
controller and AC97 controller platform devices are added.

The user can also choose between the EVKLCD100 (QVGA display) and the
EVKLCD101 (VGA display), this is added to automagically select the
correct panel timing and resolution parameters.

Enabling support for EVKLCD10X addon board will cripple the MCI platform
device a bit since they share two GPIO lines (detect and write-protect).
These two lines are disabled when EVKLCD10X is enabled.

The default configurations are based upon ATNGW100, but with added AC97C
and LCDC driver. Virtual terminal is also enabled by default for
EVKLCD10X boards.

Verified on hardware with a NGW100 + EVKLCD100/101.
Signed-off-by: NHans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

at32_select_periph() now takes an u32 bitmask rather than a single pin.
This allows to set multiple pins at once.
Signed-off-by: NAlex Raimondi <mailinglist@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Add the necessary platform infrastructure to support multiple mmc/sdcard
slots all at once through a single controller. Currently, the driver
will use the first valid slot it finds and stick with that, but later
patches will add support for switching between several slots on the fly.

Extend the platform data structure with per-slot information: MMC/SDcard
bus width and card detect/write protect pins. This will affect the pin
muxing as well as the capabilities announced to the mmc core.

Note that board code is now required to supply a mci_platform_data
struct to at32_add_device_mci().
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

The NGW100 board has jumper J15 (near the reset button) which
is unused.  This patch exports it through the GPIO sysfs support
(as /sys/class/gpio/gpio62/value) so that it's easily queried
by boot scripts or whatever might want to know if the jumper
has been installed (value = 0) or not (value = 1, "default").
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
[haavard.skinnemoen@atmel.com: add missing include]
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Doing this in combination with "atmel_spi: fix hang due to missed
interrupt" appears to eliminate the overruns I'm seeing when using
JFFS2-on-DataFlash as /usr filesystem on the ATNGW100.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

Update all avr32-specific files to use the new platform-specific header
locations. Drivers shared with ARM are left alone for now.
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

This is a driver for the MMC controller on the AP7000 chips from
Atmel. It should in theory work on AT91 systems too with some
tweaking, but since the DMA interface is quite different, it's not
entirely clear if it's worth merging this with the at91_mci driver.

This driver has been around for a while in BSPs and kernel sources
provided by Atmel, but this particular version uses the generic DMA
Engine framework (with the slave extensions) instead of an
avr32-only DMA controller framework.

This driver can also use PIO transfers when no DMA channels are
available, and for transfers where using DMA may be difficult or
impractical for some reason (e.g. the DMA setup overhead is usually
not worth it for very short transfers, and badly aligned buffers or
lengths are difficult to handle.)

Currently, the driver only support PIO transfers. DMA support has been
split out to a separate patch to hopefully make it easier to review.

The driver has been tested using mmc-block and ext3fs on several SD,
SDHC and MMC+ cards. Reads and writes work fine, with read transfer
rates up to 3.5 MiB/s on fast cards with debugging disabled.

The driver has also been tested using the mmc_test module on the same
cards. All tests except 7, 9, 15 and 17 succeed. The first two are
unsupported by all the cards I have, so I don't know if the driver
handles this correctly. The last two fail because the hardware flags a
Data CRC Error instead of a Data Timeout error. I'm not sure how to deal
with that.

Documentation for this controller can be found in many data sheets from
Atmel, including the AT32AP7000 data sheet which can be found here:

http://www.atmel.com/dyn/products/datasheets.asp?family_id=682Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>
Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>

Basic I2C initialization for the NGW100 board:

  - Provide empty i2c device table. Daughtercards may add devices,
    and the ATtiny24 could do stuff too.

  - Set up EXTINT(3) so the ATtiny24 can interrupt the AP7000.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

On our custom board we have other oscillator rates than on atngw100 and
atstk100x.

Currently these rates are hardcoded in arch/avr32/mach-at32ap/at32ap700x.c.

This patch moves them into board specific code.
Signed-off-by: NAlex Raimondi <raimondi@miromico.ch>
Signed-off-by: NHaavard Skinnemoen <haavard.skinnemoen@atmel.com>

These are derivatives of the AT32AP7000 chip, which means that most of
the code stays the same. Rename a few files, functions, definitions
and config symbols to reflect that they apply to all AP700x chips, and
exclude some platform devices from chips where they aren't present.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Make the NGW100 bitbang i2c use open drain signaling.

Also, speed it up, so it's closer to 100 kHz ... the code paths seem
to be long enough that the udelay isn't dominating bit times.  The
peak bit rate I observed was around 125 kHz, but that's with large
delays (usually before ACK/NAK) which hold the overall rate down to
around 80 kHz (call it 100 usec/byte on average).
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Implement at32_add_device_usba() and use it to wire up the USBA device
on ATSTK1000 and ATNGW100.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The NGW100 has a board controller which is hooked up to the TWI lines
on AP7000. Since the TWI driver isn't in mainline, use the i2c-gpio
driver in the mean time.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Add GPIO leds to the NGW100 platform and its defconfig.
Access through /sys/class/leds/{a,b,sys}/* files; one
defaults to a heartbeat.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NRichard Purdie <rpurdie@rpsys.net>

USART mapping used to be accomplished by the manual filling of
at32_usart_map[] and at32_nr_usarts.  This has now been replaced
with at32_map_usart() so we can remove these variables.
Signed-off-by: NBen Nizette <ben.nizette@iinet.net.au>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Add board code and defconfig for the ATNGW100 Network Gateway kit.
For more information about this board, see

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=4102Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Since the core setup code takes care of both allocation and
reservation of framebuffer memory, there's no need for this board-
specific hook anymore. Replace it with two global variables,
fbmem_start and fbmem_size, which can be used directly.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Set up one spi_board_info array per controller and pass this to
at32_add_device_spi so that it can set up any GPIO pins for chip
selects based on this information.

Extracted from a patch by David Brownell and adapted slightly.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Move stuff in spi.c into ATSTK1002 board code and update SPI
platform device definitions according to the new GPIO API.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.

It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Fixes to USART setup on the stk-1000 ... don't configure USART 2, since
its TXD/RXD are used for INT-A and INT-B buttons; and configure USART 0
(for IRDA, and with corrected IRQ) iff SW2 has a non-default setting.
Signed-off-by: NDavid Brownell <dbrownell@users.sourceforge.net>
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

The macb driver will probe for the PHY chip and read the mac address
from the MACB registers, so we don't need them in eth_platform_data
anymore.

Since u-boot doesn't currently initialize the MACB registers with the
mac addresses, the tag parsing code is kept but instead of sticking
the information into eth_platform_data, it uses it to initialize
the MACB registers (in case the boot loader didn't do it.) This code
should be unnecessary at some point in the future.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

By moving the ethernet tag parsing to the board-specific code we avoid
the issue of figuring out which device we're supposed to attach the
information to.  The board specific code knows this because it's
where the actual devices are instantiated.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>

Allow the board to remap actual USART peripheral devices to serial
devices by calling at32_map_usart(hw_id, serial_line). This ensures
that even though ATSTK1002 uses USART1 as the first serial port, it
will still have a ttyS0 device.

This also adds a board-specific early setup hook and moves the
at32_setup_serial_console() call there from the platform code.
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>

This adds support for the Atmel AVR32 architecture as well as the AT32AP7000
CPU and the AT32STK1000 development board.

AVR32 is a new high-performance 32-bit RISC microprocessor core, designed for
cost-sensitive embedded applications, with particular emphasis on low power
consumption and high code density.  The AVR32 architecture is not binary
compatible with earlier 8-bit AVR architectures.

The AVR32 architecture, including the instruction set, is described by the
AVR32 Architecture Manual, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32000.pdf

The Atmel AT32AP7000 is the first CPU implementing the AVR32 architecture.  It
features a 7-stage pipeline, 16KB instruction and data caches and a full
Memory Management Unit.  It also comes with a large set of integrated
peripherals, many of which are shared with the AT91 ARM-based controllers from
Atmel.

Full data sheet is available from

http://www.atmel.com/dyn/resources/prod_documents/doc32003.pdf

while the CPU core implementation including caches and MMU is documented by
the AVR32 AP Technical Reference, available from

http://www.atmel.com/dyn/resources/prod_documents/doc32001.pdf

Information about the AT32STK1000 development board can be found at

http://www.atmel.com/dyn/products/tools_card.asp?tool_id=3918

including a BSP CD image with an earlier version of this patch, development
tools (binaries and source/patches) and a root filesystem image suitable for
booting from SD card.

Alternatively, there's a preliminary "getting started" guide available at
http://avr32linux.org/twiki/bin/view/Main/GettingStarted which provides links
to the sources and patches you will need in order to set up a cross-compiling
environment for avr32-linux.

This patch, as well as the other patches included with the BSP and the
toolchain patches, is actively supported by Atmel Corporation.

[dmccr@us.ibm.com: Fix more pxx_page macro locations]
[bunk@stusta.de: fix `make defconfig']
Signed-off-by: NHaavard Skinnemoen <hskinnemoen@atmel.com>
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NDave McCracken <dmccr@us.ibm.com>
Signed-off-by: NAndrew Morton <akpm@osdl.org>
Signed-off-by: NLinus Torvalds <torvalds@osdl.org>