1. 08 7月, 2005 3 次提交
  2. 07 7月, 2005 12 次提交
  3. 06 7月, 2005 17 次提交
  4. 05 7月, 2005 3 次提交
    • D
      [SPARC64]: Do proper DMA IRQ syncing on Tomatillo · bb6743f4
      David S. Miller 提交于
      This was the main impetus behind adding the PCI IRQ shim.
      
      In order to properly order DMA writes wrt. interrupts, you have to
      write to a PCI controller register, then poll for that bit clearing.
      There is one bit for each interrupt source, and setting this register
      bit tells Tomatillo to drain all pending DMA from that device.
      
      Furthermore, Tomatillo's with revision less than 4 require us to do a
      block store due to some memory transaction ordering issues it has on
      JBUS.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      bb6743f4
    • D
      [SPARC64]: Add support for IRQ pre-handlers. · 088dd1f8
      David S. Miller 提交于
      This allows a PCI controller to shim into IRQ delivery
      so that DMA queues can be drained, if necessary.
      
      If some bus specific code needs to run before an IRQ
      handler is invoked, the bus driver simply needs to setup
      the function pointer in bucket->irq_info->pre_handler and
      the two args bucket->irq_info->pre_handler_arg[12].
      
      The Schizo PCI driver is converted over to use a pre-handler
      for the DMA write-sync processing it needs when a device
      is behind a PCI->PCI bus deeper than the top-level APB
      bridges.
      
      While we're here, clean up all of the action allocation
      and handling.  Now, we allocate the irqaction as part of
      the bucket->irq_info area.  There is an array of 4 irqaction
      (for PCI irq sharing) and a bitmask saying which entries
      are active.
      
      The bucket->irq_info is allocated at build_irq() time, not
      at request_irq() time.  This simplifies request_irq() and
      free_irq() tremendously.
      
      The SMP dynamic IRQ retargetting code got removed in this
      change too.  It was disabled for a few months now, and we
      can resurrect it in the future if we want.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      088dd1f8
    • R
      [SPARC64/COMPAT]: Add some compat ioctl for ppdev · e7270dec
      Raphael Assenat 提交于
      The following patch adds some ioctls to include/linux/compat_ioctl.h
      to allow using ppdev from the 32 bit user space on sparc64.
      
      This patch also adds the PPDEV option in the sparc64 menu, near Parallel
      printer support in the 'General machine setup' submenu.
      
      All those ioctls seem to be compatible, since (correct me if I'm wrong)
      they dont use the 'long' type. See include/linux/ppdev.h.
      
      The application I used to test the new ioctls only used the following:
      PPEXCL
      PPCLAIM
      PPNEGOT
      PPGETMODES
      PPRCONTROL
      PPWCONTROL
      PPDATADIR
      PPWDATA
      PPRDATA
      
      But I beleive that the other ioctls will work fine.
      Signed-off-by: NDavid S. Miller <davem@davemloft.net>
      e7270dec
  5. 04 7月, 2005 3 次提交
  6. 03 7月, 2005 1 次提交
  7. 02 7月, 2005 1 次提交
    • G
      [PATCH] PCI: clean up dynamic pci id logic · 75865858
      Greg Kroah-Hartman 提交于
      The dynamic pci id logic has been bothering me for a while, and now that
      I started to look into how to move some of this to the driver core, I
      thought it was time to clean it all up.
      
      It ends up making the code smaller, and easier to follow, and fixes a
      few bugs at the same time (dynamic ids were not being matched
      everywhere, and so could be missed on some call paths for new devices,
      semaphore not needed to be grabbed when adding a new id and calling the
      driver core, etc.)
      
      I also renamed the function pci_match_device() to pci_match_id() as
      that's what it really does.
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      75865858