These files all make use of one of the EXPORT_SYMBOL variants
or the THIS_MODULE macro.  So they will need <linux/export.h>
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>

With d8ecc5cd (kbuild: asm-generic support, 2011-04-27) we can
remove a handful of asm-generic wrappers in ARM code. Since the
generic version of sizes.h doesn't contain SZ_48M, we replace
the 4 users of SZ_48M with the equivalent SZ_32M + SZ_16M.
Signed-off-by: NStephen Boyd <sboyd@codeaurora.org>
Cc: Imre Kaloz <kaloz@openwrt.org>
Acked-by: NKrzysztof Halasa <khc@pm.waw.pl>
Cc: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Annotate the low level hardware locks which must not be preempted.

In mainline this change documents the low level nature of
the lock - otherwise there's no functional difference. Lockdep
and Sparse checking will work as usual.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Convert PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to variables to allow
multi-platform builds. This also removes the requirement for a platform to
have a mach/hardware.h.

The default values for i/o and mem are 0x1000 and 0x01000000, respectively.
Per Arnd Bergmann, other values are likely to be incorrect, but this commit
does not try to address that issue.
Signed-off-by: NRob Herring <rob.herring@calxeda.com>
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: NArnd Bergmann <arnd@arndb.de>

As the needs_bounce function is passed at DMA bounce register time,
we already know what the device bus type is, so we don't need to check
it each time the needs_bounce function is called.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Pass the device type specific needs_bounce function in at dmabounce
register time, avoiding the need for a platform specific global
function to do this.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Rather than each platform providing its own function to adjust the
zone sizes, use the new ARM_DMA_ZONE_SIZE definition to perform this
adjustment.  This ensures that the actual DMA zone size and the
ISA_DMA_THRESHOLD/MAX_DMA_ADDRESS definitions are consistent with
each other, and moves this complexity out of the platform code.
Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org>
Acked-by: NCatalin Marinas <catalin.marinas@arm.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

arm: export dma_set_coherent_mask

While a regression was fixed with commit 710224fa (arm: fix
"arm: fix pci_set_consistent_dma_mask for dmabounce devices"), a
new one was introduced as dma_set_coherent_mask wasn't exported
for modules. This patch takes care for this issue.
Signed-off-by: NImre Kaloz <kaloz@openwrt.org>
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This fixes the regression caused by the commit 6fee48cd
("dma-mapping: arm: use generic pci_set_dma_mask and
pci_set_consistent_dma_mask").

ARM needs to clip the dma coherent mask for dmabounce devices. This
restores the old trick.

Note that strictly speaking, the DMA API doesn't allow architectures to do
such but I'm not sure it's worth adding the new API to set the dma mask
that allows architectures to clip it.
Reported-by: NKrzysztof Halasa <khc@pm.waw.pl>
Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Add one more parameter to hook_fault_code() to be able to set 'code'
field of struct fsr_info.
Signed-off-by: NKirill A. Shutemov <kirill@shutemov.name>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Since we no longer support discontigmem, node is always zero, so
remove this argument.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This converts arm to the generic pci_set_dma_mask and
pci_set_consistent_dma_mask (removes HAVE_ARCH_PCI_SET_DMA_MASK for
dmabounce).
Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp>
Looked-over-by: NRussell King <rmk+kernel@arm.linux.org.uk>
Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
Cc: Greg KH <greg@kroah.com>
Cc: Kay Sievers <kay.sievers@vrfy.org>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

IXP4xx CPUs can indirectly access the whole 4 GB PCI MMIO address space (using
the non-prefetch registers). Previously the available space depended on the CPU
variant, since one of the IXP43x platforms needed more than the usual 128 MB.
1 GB should be enough for everyone, and if not, we can trivially increase it.
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>

Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>

Map unused registers at the end of DMA region at 64 MB to allow PCI masters
to cross the boundary when prefetching data from SDRAM.
Signed-off-by: NKrzysztof Hałasa <khc@pm.waw.pl>

Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add asm/cputype.h, moving functions and definitions from asm/system.h
there.  Convert all users of 'processor_id' to the more efficient
read_cpuid_id() function.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove includes of asm/hardware.h in addition to asm/arch/hardware.h.
Then, since asm/hardware.h only exists to include asm/arch/hardware.h,
update everything to directly include asm/arch/hardware.h and remove
asm/hardware.h.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

__FUNCTION__ is gcc-specific, use __func__
Signed-off-by: NHarvey Harrison <harvey.harrison@gmail.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Add Intel KIXRP435 Reference Platform based on IXP43x processor.
Fixed after review : access to cp15 removed in identification functions,
used access to global processor_id instead
Signed-off-by: NVladimir Barinov <vbarinov@ru.mvista.com>
Signed-off-by: NRuslan  Sushko <rsushko@ru.mvista.com>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Remove duplicate PCI exports from ixp4xx machine class.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Convert all uses of kmalloc followed by memset to use kzalloc instead.
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Rod Whitby

PAGE_SHIFT is undeclared in include/asm-arm/arch-ixp4xx/memory.h, identified by the following kernel compilation error:

CC [M] sound/core/memory.o
In file included from include/asm/memory.h:27,
from include/asm/io.h:28,
from sound/core/memory.c:24:
include/asm/arch/memory.h: In function `__arch_adjust_zones':
include/asm/arch/memory.h:28: error: `PAGE_SHIFT' undeclared (first use
in this function)

This patch replaces my previous attempt at fixing this problem (Patch 3214/1) and is based on the following feedback:

Russell King wrote:
> The error you see came up on SA1100.  The best solution was to move
> the __arch_adjust_zones() function out of line.  I suggest ixp4xx
> does the same.

I have moved the function out of line into arch/arm/mach-ixp4xx/common-pci.c as suggested.
Signed-off-by: NRod Whitby <rod@whitby.id.au>
Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Alessandro Zummo

  This patch fixes AHB/PCI endianness problems when the
 processor is in little-endian mode.

 The patch configures the CSR register closely following the directives
 in [1], paragraph 4.1, page 19.

 According to the considerations in [1], page 11, while the AHB bus
 supports both endian modes, on the IXP4XX it always uses big-endian.

 The PCI bus is connected to the South AHB. A wrong setting in the CSR
 register will thus cause a malfunctional PCI bus.

 A schematic diagram of the bus interconnections on the IXP4XX
 can be found in [1], page 18.

 The patch has been verified to work on the NSLU2 in
 both LE and BE modes.

 The author is Peter Korsgaard.

 [1] Intel® IXP4XX Product Line of Network Processors and IXC1100
 Control Plane Processor:
 Understanding Big Endian and Little Endian Modes

 http://www.intel.com/design/network/applnots/25423701.pdfSigned-off-by: NAlessandro Zummo <a.zummo@towertech.it>
Signed-off-by: NDeepak Saxena <dsaxena@plexity.net>
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

Patch from Deepak Saxena

This patch implements the iomap API for Intel IXP4xx NPU systems.
We need to implement our own version of the API functions b/c of the
PCI hostbridge does not provide the capability to map PCI I/O space
into the CPU's physical memory space. In addition, if a system has
more than 64M of PCI memory mapped BARs, PCI memory must also be
accessed indirectly.  This patch changes the assignment of PCI I/O
resources to fall into to 0x0000:0xffff range so that we can trap
I/O areas in our ioread/iowrite macros.

Signed-off-by: Deepak Saxena
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>

pci_dac_set_dma_mask is currently completely unused.
Signed-off-by: NAdrian Bunk <bunk@stusta.de>
Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>

Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.

Let it rip!