- 15 8月, 2016 1 次提交
-
-
由 Lucile Quirion 提交于
These device trees add support for TS-4900 by Technologic Systems. More details here: http://wiki.embeddedarm.com/wiki/TS-4900Signed-off-by: NLucile Quirion <lucile.quirion@savoirfairelinux.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 19 10月, 2015 2 次提交
-
-
由 Gary Bisson 提交于
Based on i.MX6 Quad with 4GB of DDR3. http://boundarydevices.com/product/nitrogen6max/Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
由 Gary Bisson 提交于
Signed-off-by: NGary Bisson <gary.bisson@boundarydevices.com> Signed-off-by: NShawn Guo <shawnguo@kernel.org>
-
- 09 2月, 2014 7 次提交
-
-
由 Troy Kisky 提交于
This makes the structure of Sabre Lite board files the same as Sabre SD board files so that they are easier to compare. By this, I mean that the majority of the file imx6q-sabrelite.dts is moved to imx6qdl-sabrelite.dtsi so that both imx6q-sabrelite.dts and imx6dl-sabrelite.dts can include it. Now Sabre Lite has support for Dual Lite/Solo processors. Signed-off-by: NTroy Kisky <troy.kisky@boundarydevices.com> Reviewed-by: NMarek Vasut <marex@denx.de> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Marek Vasut 提交于
Signed-off-by: NMarek Vasut <marex@denx.de> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Frank Li <lznuaa@gmail.com> Cc: Harro Haan <hrhaan@gmail.com> Cc: Jingoo Han <jg1.han@samsung.com> Cc: Mohit KUMAR <Mohit.KUMAR@st.com> Cc: Pratyush Anand <pratyush.anand@st.com> Cc: Richard Zhu <r65037@freescale.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Sean Cross <xobs@kosagi.com> Cc: Siva Reddy Kallam <siva.kallam@samsung.com> Cc: Srikanth T Shivanand <ts.srikanth@samsung.com> Cc: Tim Harvey <tharvey@gateworks.com> Cc: Troy Kisky <troy.kisky@boundarydevices.com> Cc: Yinghai Lu <yinghai@kernel.org> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
In order to follow the standard approach used on other imx dts files, place the 'status' node as the last one. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Nicolin Chen 提交于
We must specify the value of audmux pinctrl if we want to use pinctrl_pm(). Thus change bypass value 0x80000000 to what we exactly need. This patch also seperately unset PUE bit for TXD so that IOMUX won't pull up/down the pin after turning into tristate. When we use SSI normal mode to playback monaural audio via I2S signal, there'd be a pulled curve occur to its signal at the second slot if setting PUE bit for TXD. And it will make the second channel to play a constant noise. So by keeping the signal level in the second slot, we can get a constant high level signal (-1) or a low level one (0). Signed-off-by: NNicolin Chen <b42378@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
MX6QDL_PAD_EIM_D23__GPIO3_IO23 appears twice in the hog pin group. Remove one of the occurrences. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
The device tree specification recommends that generic name should be used for nodes. So instead of naming those fixed regulator nodes arbitrarily, let's use the generic name 'regulator@num' for those nodes. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Currently, all pinctrl setting nodes are defined in <soc>.dtsi, so that boards that share the same pinctrl setting do not have to define it time and time again in <board>.dts. However, along with the devices and use cases being added continuously, the pinctrl setting nodes under iomuxc becomes more than expected. This bloats device tree blob for particular board unnecessarily since only a small subset of those pinctrl setting nodes will be used by the board. It impacts not only the DTB file size but also the run-time device tree lookup efficiency. The patch moves all the pinctrl data into individual boards as needed. With the changes, the pinctrl setting nodes becomes local to particular board, and it makes no sense to continue numbering the setting for given peripheral. Thus, all the pinctrl phandler name gets updated to have only peripheral name in there. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 29 9月, 2013 1 次提交
-
-
由 Fabio Estevam 提交于
MX6QDL_PAD_EIM_D23__GPIO3_IO23 pin is used to reset the ethernet phy. Add it to the 'hog' group. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 26 9月, 2013 2 次提交
-
-
由 Fabio Estevam 提交于
imx6q-sabrelite board can be connected to a 1024x768 Hannstar LVDS panel. Add support for it. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
Put the nodes in alphabetical order so that further node additions can be better organized. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 22 8月, 2013 3 次提交
-
-
由 Shawn Guo 提交于
The CLKO is widely used by imx6q board designs to clock audio codec. Since most codecs accept 24 MHz frequency, let's initially set up CLKO with OSC24M (cko <-- cko2 <-- osc). Then those board specific CLKO setup for audio codec can be removed. The board dts files also need an update on cko reference in codec node. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhu 提交于
Only imx6q has the ahci sata controller, enable it on imx6q platforms. Signed-off-by: NRichard Zhu <r65037@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board design can work with either chip plugged into the socket, e.g. sabresd and sabreauto boards. We currently define pin groups in imx6q.dtsi and imx6dl.dtsi respectively because the pad macro names are different between two chips. This brings a maintenance burden on having the same label point to the same pin group defined in two places. The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs pad macro names. Then the pin groups becomes completely common between imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the long term maintenance of imx6q/dt pin settings becomes easier. Unfortunately, the change brings some dramatic diff stat, but it's all about DTS file, and the ultimate net diff stat is good. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 09 4月, 2013 2 次提交
-
-
由 Shawn Guo 提交于
Currently, all imx pinctrl drivers maintain a big array of struct imx_pin_reg which hard-codes data like register offset and mux mode setting for each pin function. Every time a new imx SoC support is added, we need to add such a big mount of data. With moving to single kernel build, it's only matter of time to be blamed on memory consuming. With DTC pre-processor support in place, the patch moves all these data into device tree by redefining the PIN_FUNC_ID in imxXX-pinfunc.h and changing the PIN_FUNC_ID parsing code a little bit. The pin id gets re-numbered based on mux register offset, or config register offset if the pin has no mux register, so that kernel can identify the pin id from register offsets provided by device tree. As a bonus point of the change, those arbitrary magic numbers standing for particular PIN_FUNC_ID in device tree sources are now replaced by macros to improve the readability of dts files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NDong Aisheng <dong.aisheng@linaro.org> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
-
由 Shawn Guo 提交于
Replace /include/ (dtc) with #include (C pre-processor) for all imx DT files, so that gcc -E handles the entire include tree, and hence any of those files can #include some other file e.g. for constant definitions. This allows future use of #defines and header files in order to define names for various constants, such as pinctrl settings. Use of those features will increase the readability of the device tree files. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 10 2月, 2013 3 次提交
-
-
由 Shawn Guo 提交于
Add dtsi for imx6q and imx6dl with non-common blocks moved into there. Major differences between imx6dl and imx6q: * Dual vs. Quad cores * single vs. dual IPU * 128 vs. 256 KB OCRAM * imx6q: ECSPI5, OpenVG (GC355), SATA * imx6dl: I2C4, PXP, EPDC, LCDIF * iomuxc/pads definition Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
i.MX6 Quad and i.MX6 DualLite is similar enough to share one dtsi file, so rename imx6q.dtsi to imx6qdl.dtsi preparing for the addition of imx6dl support. Another member of i.MX6 series i.MX6 SoloLite is different enough from the other two, so it will stand as a separate dtsi. That's why we rename to imx6qdl.dtsi not imx6.dtsi. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Following omap3-evm.dts way, it changes all imx dts files to use label in board dts to refer to nodes defined by soc dtsi. Thus, the board dts files become easier to read and edit with the least indentation levels. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 19 9月, 2012 1 次提交
-
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 17 9月, 2012 1 次提交
-
-
由 Richard Zhao 提交于
- add usbmisc device - set property fsl,usbmisc for usb controllers - set disable-over-current for imx6q-sabrelite usb otg Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 11 9月, 2012 5 次提交
-
-
由 Shawn Guo 提交于
It really becomes an maintenance issue that every time a device needs to look up (clk_get) a clock we have to patch kernel clock file to call clk_register_clkdev for that clock. Since clock DT support which is meant to resolve clock lookup in device tree is in place, the patch moves imx6q client devices' clock lookup over to device tree, so that any new lookup to be added at later time can just get done in DT instead of kernel. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
'pinctrl_gpio_hog' is used to setup the pin functions, and it is not neccesarily used only for GPIO pins, so remove 'gpio' from its name to describe a more generic term. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Add missing pinctrl of usdhc and enet for imx6q-sabrelite board. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Name iomuxc sub-nodes following pin function and hardware manual. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
Change the indentation for property fsl,pins a little bit, so that the first and the last line get the same indentation with all other lines. Then it will be easier to copy and past any of these lines. Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 03 8月, 2012 1 次提交
-
-
由 Fabio Estevam 提交于
In order to have audio functional on mx6qsabrelite, it is necessary to setup the IOMUX for MX6Q_PAD_GPIO_0__CCM_CLKO pins as it provides the audio clock. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 12 7月, 2012 2 次提交
-
-
由 Hui Wang 提交于
Imx6q sabrelite board uses ecspi1 to connect a spi flash sst25vf016b, we need to add pinctrl information for it in the dts, otherwise the ecspi1 driver can't work and the connected flash is wrongly detected as a mr25h256 flash like this: m25p80 spi32766.0: found mr25h256, expected sst25vf016b m25p80 spi32766.0: mr25h256 (32 Kbytes) Cc: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: NHui Wang <jason77.wang@gmail.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
- add usbphy devices - add usb host controller and otg devices - add usb h1 vbus regulator Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
- 11 5月, 2012 8 次提交
-
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Richard Zhao 提交于
Signed-off-by: NRichard Zhao <richard.zhao@linaro.org> Signed-off-by: NRichard Zhao <richard.zhao@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Fabio Estevam 提交于
mx6qsabrelite has a sst25vf016b SPI NOR flash connected to eCSPI1. Add support for it. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-
由 Shawn Guo 提交于
It has been pointed out by device tree maintainer for several times that the generic names 'serial' and 'ethernet' should be used for those devices per ePAPR. Renames imx uart and fec device tree nodes to stop them being bad examples. Signed-off-by: NShawn Guo <shawn.guo@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de>
-
- 27 2月, 2012 1 次提交
-
-
由 Shawn Guo 提交于
Signed-off-by: NShawn Guo <shawn.guo@linaro.org>
-