Collection of aesthetic adjustments to various PPS-related files,
directories and Documentation, some quite minor just for the sake of
consistency, including:

 * Updated example of pps device tree node (courtesy Rodolfo G.)
 * "PPS-API" -> "PPS API"
 * "pps_source_info_s" -> "pps_source_info"
 * "ktimer driver" -> "pps-ktimer driver"
 * "ppstest /dev/pps0" -> "ppstest /dev/pps1" to match example
 * Add missing PPS-related entries to MAINTAINERS file
 * Other trivialities

Link: http://lkml.kernel.org/r/alpine.LFD.2.20.1708261048220.8106@localhost.localdomainSigned-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>
Acked-by: NRodolfo Giometti <giometti@enneenne.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Pretty much any node can have a status property, so it doesn't need to
be in examples.

Converted with the following command and removed examples with SoC and
board specific splits:

git grep -l -E 'status.*=.*' Documentation/devicetree/ | xargs sed -i -E '/\sstatus.*=.*"(disabled|ok|okay)/d'
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NRob Herring <robh@kernel.org>

Add Device Tree bindings for RAVE Supervisory Processor, an MCU
implementing varoius bits of housekeeping functionality (watchdoging,
backlight control, LED control, etc) on RAVE family of products by
Zodiac Inflight Innovations.
Acked-by: NRob Herring <robh+dt@kernel.org>
Signed-off-by: NAndrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add DT bindings for the ROHM BD9571MWV-M PMIC. This PMIC has
the following features:
- multiple voltage monitors for 1V8, 2V5, 3V3 voltage rail
- one voltage regulator for DVFS
- two GPIOs
Signed-off-by: NMarek Vasut <marek.vasut+renesas@gmail.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The X-Powers AXP813 is a PMIC designed to be paired with Allwinner's
A83T SoC. There is also an AXP818, which is paired with the H8 SoC.

The two models seem to be identical, apart from the external markings.

This patch introduces the basic mfd and regulator bindings for the
AXP813.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

The binding already lists compatibles and regulators for the AXP806,
but it is missing from the list of supported chips at the beginning.

Add it.

Fixes: 204ae296 ("mfd: axp20x: Add bindings for AXP806 PMIC")
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

A new compatible string is introduced for SMC on sama5d2 to manage a
different layout of the registers.
Signed-off-by: NLudovic Desroches <ludovic.desroches@microchip.com>
│Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

DA9052 allows using the touchscreen input pins as general purpose
analogue input pin by wiring analogue inputs to X+, X-, Y+ and Y-
and providing a reference voltage at TSIREF pin.
Signed-off-by: NSebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Allwinner V3s has a DMA engine similar to the ones from A31, but with
fewer channels and DRQs.

Add support for it.
Signed-off-by: NIcenowy Zheng <icenowy@aosc.xyz>
Acked-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Renesas R-Car V3M (R8A77970) SoC also has the R-Car gen2/3 compatible DMA
controllers, so document the SoC specific binding.
Signed-off-by: NSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NVinod Koul <vinod.koul@intel.com>

Add documentation for STMicroelectronics STM32 Low-Power Timer
quadrature encoder and counter binding.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: NJonathan Cameron <jic23@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add documentation for STMicroelectronics STM32 Low-Power Timer Trigger
binding.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: NJonathan Cameron <jic23@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add documentation for STMicroelectronics STM32 Low-Power Timer
PWM binding.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Add documentation for STMicroelectronics STM32 Low-Power Timer binding.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: NJonathan Cameron <jic23@kernel.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLee Jones <lee.jones@linaro.org>

Use the preferred generic node name in the example.
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NRob Herring <robh@kernel.org>

This patch adds Mellanox vendor to vendor-prefixes.
Signed-off-by: NVadim Pasternak <vadimp@mellanox.com>
Signed-off-by: NRob Herring <robh@kernel.org>

A link interrupt can be described. Document this valid interrupt name.
Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com>
Tested-by: NMarcin Wojtas <mw@semihalf.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Document the devicetree bindings for the ltq-cputemp
Signed-off-by: NFlorian Eckert <fe@dev.tdt.de>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>

Add devicetree bindings documentation file for Cirrus
Logic CS43130 codec.
Signed-off-by: NLi Xu <li.xu@cirrus.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Some CPU drivers (e. g. davinci-mcasp) may require the system clock to
be configured as OUT, while there's no good way currently to set
SND_SOC_CLK_OUT in simple-soc driver if the clock is fixed-rate.

This patch makes asoc_simple_card_init_dai() initialize clock to
SND_SOCK_CLK_OUT if explicitly stated in the relevant dts file. This
change is transparent and doesn't change the default behavior.
Signed-off-by: NVitaly Wool <vitaly.wool@konsulko.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This is board specific info so it should come from board config, such
as devicetree.

I've chosen to prefix these with "fcs," treating them as fusb302 driver
specific for now. We may want to revisit this and replace these with
properties which are part of a (to be written) generic type-c controller
devicetree binding.

Since this commit adds new dt-properties it also adds devicetree-bindings
documentation (which so far was absent for the fusb302 driver).

Cc: Rob Herring <robh+dt@kernel.org>
Cc: Frank Rowand <frowand.list@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: "Yueyao (Nathan) Zhu" <yueyao@google.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Acked-by: NRob Herring <robh@kernel.org>
Reviewed-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The mt8173-mtu3.txt actually holds the bindings for all mediatek
SoCs with usb3 DRD IP, so add a generic compatible and change the
name to mediatek,mtu3.txt.
Signed-off-by: NChunfeng Yun <chunfeng.yun@mediatek.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The mt8173-xhci.txt actually holds the bindings for all mediatek
SoCs with xHCI controller, so add a generic compatible and change
the name to mediatek,mtk-xhci.txt to reflect that.
Signed-off-by: NChunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

A MSI controller of LS1043a v1.0 only includes one MSIR and
is assigned one GIC interrupt. In order to support affinity,
LS1043a v1.1 MSI is assigned 4 MSIRs and 4 GIC interrupts.
But the MSIR has the different offset and only supports 8 MSIs.
The bits between variable bit_start and bit_end in structure
ls_scfg_msir are used to show 8 MSI interrupts. msir_irqs and
msir_base are added to describe the difference of MSI between
LS1043a v1.1 and other SoCs.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

LS1046a includes 3 MSI controllers.
Each controller supports 128 interrupts.
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

The patch is to fix typo of the Layerscape SCFG MSI dts compatible
strings. "1" is replaced by "l".
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMinghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: NHou Zhiqiang <Zhiqiang.Hou@nxp.com>
Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com>

Add support for general purpose (GP) clocks
for apq8064

DT binding documentation updated for
qcom,apq8064-pinctrl general purpose (GP) clocks.
Signed-off-by: NVinay Simha BN <simhavcs@gmail.com>
Acked-by: NBjorn Andersson <bjorn.andersson@linaro.org>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In aic3x class of devices Output Common-Mode Voltage can be configured for
better analog performance.
The OCMV value depends on the Analog and digital domain power supply
voltage configuration.

The default OCMV of 1.35V gives best performance when AVDD is around 2.7V
and DVDD is 1.525V, but for higher AVDD/DVDD higher OCMV setting is
recommended.

The patch gives an automatic way of guessing the best OCMV which can be
overwritten by a DT parameter if needed.
Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

This patch adds the binding documentation for Spreadtrum SC9860 pin
controller device.
Signed-off-by: NBaolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

In some scenarios, we should set some pins as input/output/pullup/pulldown
when the specified system goes into deep sleep mode, then when the system
goes into deep sleep mode, these pins will be set automatically by hardware.

That means some pins are not controlled by any specific driver in the OS, but
need to be controlled when entering sleep mode. Thus we introduce one sleep
state config into pinconf-generic for users to configure.
Signed-off-by: NBaolin Wang <baolin.wang@spreadtrum.com>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

Implement vas_init() and vas_exit() functions for a new VAS module.
This VAS module is essentially a library for other device drivers
and kernel users of the NX coprocessors like NX-842 and NX-GZIP.
In the future this will be extended to add support for user space
to access the NX coprocessors.

VAS is currently only supported with 64K page size.
Signed-off-by: NSukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: NMichael Ellerman <mpe@ellerman.id.au>

The Marvell Armada 7K/8K SoCs contains an hardware block called COMPHY
that provides a number of shared PHYs used by various interfaces in the
SoC: network, SATA, PCIe, etc. This Device Tree binding allows to
describe this COMPHY hardware block.
Signed-off-by: NAntoine Tenart <antoine.tenart@free-electrons.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Document STM32 VREFBUF (voltage reference buffer) which can be used as
voltage reference for ADCs, DACs and external components.
Signed-off-by: NFabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NMark Brown <broonie@kernel.org>

Nodes without reg properties must not have unit addresses:

    Warning (unit_address_vs_reg): Node .../rcar_sound,dvc/dvc@0 has a unit name, but no reg property
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NMark Brown <broonie@kernel.org>

Signed-off-by: NFabrizio Castro <fabrizio.castro@bp.renesas.com>
Reviewed-by: NChris Paterson <chris.paterson2@renesas.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add support for r8a7743/5 SoC. Renesas RZ/G1[ME] (R8A7743/5) SDHI
is identical to the R-Car Gen2 family.
Signed-off-by: NBiju Das <biju.das@bp.renesas.com>
Reviewed-by: NWolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: NSimon Horman <horms+renesas@verge.net.au>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly
different. It supports a wider 8-bit bus, has a dedicated controllable
reset pin for eMMC, and a "new timing mode" which is supposed to deliver
better signals and thus better performance.

Add a compatible for this one to use the new timing mode not found in the
other controllers.
Signed-off-by: NChen-Yu Tsai <wens@csie.org>
Acked-by: NRob Herring <robh@kernel.org>
Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Signed-off-by: NChris Paterson <chris.paterson2@renesas.com>
Reviewed-by: NGeert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add "rockchip,rk3228-dw-mshc", "rockchip,rk3288-dw-mshc" for
dwmmc on rk322x platform.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Signed-off-by: NEdward A. James <eajames@us.ibm.com>
Acked-by: NRob Herring <robh@kernel.org>
Signed-off-by: NGuenter Roeck <linux@roeck-us.net>