1. 04 1月, 2012 2 次提交
  2. 20 12月, 2011 3 次提交
  3. 04 12月, 2011 2 次提交
  4. 12 11月, 2011 1 次提交
  5. 15 9月, 2011 1 次提交
  6. 24 8月, 2011 1 次提交
    • J
      video: s3c-fb: Add support EXYNOS4 FIMD · b5480ed7
      Jingoo Han 提交于
      This patch adds struct s3c_fb_driverdata s3c_fb_data_exynos4 for EXYNOS4
      and adds lcd clock gating support.
      
      FIMD driver needs two clocks for FIMD IP and LCD pixel clock. Previously,
      both clocks are provided by using bus clock such as HCLK. However, EXYNOS4
      can not select HCLK for LCD pixel clock because the EXYNOS4 FIMD IP does not
      have the CLKSEL bit of VIDCON0. So, FIMD driver should provide the lcd clock
      using SCLK_FIMD as LCD pixel clock for EXYNOS4.
      
      The driver selects enabling lcd clock according to has_clksel which means
      the CLKSEL bit of VIDCON0. If there is has_clksel, the driver will not
      enable the lcd clock using SCLK_FIMD because bus clock using HCLK is used
      a LCD pixel clock.
      Signed-off-by: NJingoo Han <jg1.han@samsung.com>
      Signed-off-by: NFlorian Tobias Schandinat <FlorianSchandinat@gmx.de>
      b5480ed7
  7. 19 8月, 2011 1 次提交
  8. 15 6月, 2011 1 次提交
  9. 09 6月, 2011 3 次提交
  10. 24 5月, 2011 6 次提交
  11. 12 4月, 2011 2 次提交
  12. 07 4月, 2011 1 次提交
  13. 22 3月, 2011 1 次提交
  14. 21 12月, 2010 1 次提交
  15. 11 8月, 2010 14 次提交