1. 30 5月, 2017 3 次提交
  2. 16 5月, 2017 3 次提交
  3. 29 4月, 2017 2 次提交
  4. 11 4月, 2017 1 次提交
    • O
      sata_via: Enable hotplug only on VT6421 · 3cf86452
      Ondrej Zary 提交于
      Commit 57e5568f ("sata_via: Implement hotplug for VT6421") adds
      hotplug IRQ handler for VT6421 but enables hotplug on all chips. This
      is a bug because it causes "irq xx: nobody cared" error on VT6420 when
      hot-(un)plugging a drive:
      
      [  381.839948] irq 20: nobody cared (try booting with the "irqpoll" option)
      [  381.840014] CPU: 0 PID: 0 Comm: swapper/0 Not tainted 4.10.0-rc5+ #148
      [  381.840066] Hardware name:          P4VM800/P4VM800, BIOS P1.60 05/29/2006
      [  381.840117] Call Trace:
      [  381.840167]  <IRQ>
      [  381.840225]  ? dump_stack+0x44/0x58
      [  381.840278]  ? __report_bad_irq+0x14/0x97
      [  381.840327]  ? handle_edge_irq+0xa5/0xa5
      [  381.840376]  ? note_interrupt+0x155/0x1cf
      [  381.840426]  ? handle_edge_irq+0xa5/0xa5
      [  381.840474]  ? handle_irq_event_percpu+0x32/0x38
      [  381.840524]  ? handle_irq_event+0x1f/0x38
      [  381.840573]  ? handle_fasteoi_irq+0x69/0xb8
      [  381.840625]  ? handle_irq+0x4f/0x5d
      [  381.840672]  </IRQ>
      [  381.840726]  ? do_IRQ+0x2e/0x8b
      [  381.840782]  ? common_interrupt+0x2c/0x34
      [  381.840836]  ? mwait_idle+0x60/0x82
      [  381.840892]  ? arch_cpu_idle+0x6/0x7
      [  381.840949]  ? do_idle+0x96/0x18e
      [  381.841002]  ? cpu_startup_entry+0x16/0x1a
      [  381.841057]  ? start_kernel+0x319/0x31c
      [  381.841111]  ? startup_32_smp+0x166/0x168
      [  381.841165] handlers:
      [  381.841219] [<c12a7263>] ata_bmdma_interrupt
      [  381.841274] Disabling IRQ #20
      
      Seems that VT6420 can do hotplug too (there's no documentation) but the
      comments say that SCR register access (required for detecting hotplug
      events) can cause problems on these chips.
      
      For now, just keep hotplug disabled on anything other than VT6421.
      Signed-off-by: NOndrej Zary <linux@rainbow-software.org>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      3cf86452
  5. 30 3月, 2017 3 次提交
  6. 28 3月, 2017 1 次提交
  7. 24 3月, 2017 1 次提交
  8. 17 3月, 2017 1 次提交
  9. 14 3月, 2017 2 次提交
  10. 10 3月, 2017 1 次提交
  11. 08 3月, 2017 1 次提交
  12. 07 3月, 2017 4 次提交
  13. 28 2月, 2017 1 次提交
  14. 24 2月, 2017 1 次提交
  15. 07 2月, 2017 1 次提交
  16. 01 2月, 2017 1 次提交
  17. 31 1月, 2017 6 次提交
  18. 28 1月, 2017 1 次提交
  19. 25 1月, 2017 1 次提交
  20. 24 1月, 2017 3 次提交
  21. 20 1月, 2017 2 次提交
    • T
      ahci: qoriq: added ls2088a platforms support · ce8f4537
      Tang Yuantian 提交于
      Ls2088a is new introduced arm-based soc with sata support with
      following features:
      1. Complies with the serial ATA 3.0 specification and the AHCI 1.3.1
         specification
      2. Contains a high-speed descriptor-based DMA controller
      3. Supports the following:
         a. Speeds of 1.5 Gb/s (first-generation SATA), 3 Gb/s
            (second-generation SATA), and 6 Gb/s (third-generation SATA)
         b. FIS-based switching
         c. Native command queuing (NCQ) commands
         d. Port multiplier operation
         e. Asynchronous notification
         f. SATA BIST mode
      Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      ce8f4537
    • T
      ahci: qoriq: report error when ecc register address is missing in dts · 01f2901a
      Tang Yuantian 提交于
      For ls1021a, and armv8 chasis 2 socs, sata ecc must be disabled.
      If ecc register is not found in sata node in dts, report error.
      
      This is a chip erratum described as bellow:
      The Read DMA operations get early termination indication from the
      controller. This issue is observed as CRC error in the status registers.
      The issue is due to address collision at address 0 in the dual port
      memory. The read is a dummy read to flush out the header, but due to
      collision the controller logs the mbit error reported by the ECC check
      logic. This results in the early termination of the Read DMA operation
      by the controller. The issue happens to all the interface
      speeds(GEN1/2/3) for all the products.
      
      Workaround:
      Disable ECC feature on those platforms.
      Signed-off-by: NTang Yuantian <yuantian.tang@nxp.com>
      Signed-off-by: NTejun Heo <tj@kernel.org>
      01f2901a