1. 08 11月, 2009 2 次提交
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      [ARM] kirkwood: fix PCI I/O port assignment · 35f029e2
      Lennert Buytenhek 提交于
      Instead of allocating PCI devices I/O port bus addresses from the
      000xxxxx I/O port range as intended, due to a bus versus physical
      address mixup, the Kirkwood PCIe handling code inadvertently
      allocated I/O port bus addresses from the f20xxxxx address range
      (which is the physical address range of the PCIe I/O mapping window),
      but then direct all I/O port accesses to bus addresses 000xxxxx,
      which would then not be decoded at all.
      
      Fix this by setting the base address of the PCIe I/O space struct
      resource to KIRKWOOD_PCIE_IO_BUS_BASE instead of the incorrect
      KIRKWOOD_PCIE_IO_PHYS_BASE, and fix up __io() to expect addresses
      offsetted by the former instead of the latter.
      
      (The suggested fix of directing I/O port accesses from the host to
      bus addresses f20xxxxx instead has the problem that assigning full
      32bit I/O port bus addresses (f20xxxxx) doesn't work on all PCI
      devices, as not all PCI devices implement full 32 bit BAR registers
      for I/O ports.  We should really try to allocate I/O port bus
      addresses that fit in 16 bits.)
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      Signed-off-by: NNicolas Pitre <nico@marvell.com>
      35f029e2
  2. 06 11月, 2009 3 次提交
  3. 04 11月, 2009 5 次提交
  4. 03 11月, 2009 30 次提交