- 05 1月, 2011 1 次提交
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由 Greg Ungerer 提交于
The version 2 ColdFire CPU based cores all contain a similar cache controller unit. Create a set of bit flag definitions for the supporting registers. Signed-off-by: NGreg Ungerer <gerg@uclinux.org>
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The version 2 ColdFire CPU based cores all contain a similar cache
controller unit. Create a set of bit flag definitions for the supporting
registers.
Signed-off-by: NGreg Ungerer <gerg@uclinux.org>