- 15 10月, 2012 4 次提交
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由 Tomasz Figa 提交于
This patch reworks wake-up interrupt handling in pinctrl-exynos driver, so each pin bank, which provides wake-up interrupts, has its own IRQ domain. Information about whether given pin bank provides wake-up interrupts, how many and whether they are separate or muxed are parsed from device tree. It gives following advantages: - interrupts can be specified in device tree in a more readable way, e.g. : device { /* ... */ interrupt-parent = <&gpx2>; interrupts = <4 0>; /* ... */ }; - the amount and layout of interrupts is not hardcoded in the code anymore, but defined in SoC-specific structure - bank and pin of each wake-up interrupt can be easily identified, to allow operations, such as setting the pin to EINT function, from irq_set_type() callback Signed-off-by: NTomasz Figa <t.figa@samsung.com> Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tomasz Figa 提交于
Instead of registering one IRQ domain for all pin banks of a pin controller, this patch implements registration of per-bank domains. At a cost of a little memory overhead (~2.5KiB for all GPIO interrupts of Exynos4x12) it simplifies driver code and device tree sources, because GPIO interrupts can be now specified per banks. Example: device { /* ... */ interrupt-parent = <&gpa1>; interrupts = <3 0>; /* ... */ }; Signed-off-by: NTomasz Figa <t.figa@samsung.com> Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tomasz Figa 提交于
Some SoCs, like Exynos4x12, have non-sequential layout of EINT control registers and so current way of calculating register addresses does not work correctly for them. This patch adds eint_offset field to samsung_pin_bank struct and modifies the driver to use it instead of calculating the offsets from bank index. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Tomasz Figa 提交于
This patch modifies the pinctrl-samsung driver to assign numbers to pins dynamically instead of static enumerations. Thanks to this change the amount of code requried to support a SoC can be greatly reduced and the code made more readable. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Reviewed-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NThomas Abraham <thomas.abraham@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 21 9月, 2012 6 次提交
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由 Tomasz Figa 提交于
Because of a typo, incorrect field of a structure was being checked. This patch fixes the check to use correct field. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
Current way of finding the wakeup-eint node scans the whole device tree not only children of the pinctrl node, so it might detect a wakeup-eint node of another pinctrl device. This patch limits the scope of looking for nodes only to subnodes of the pinctrl node. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
The exynos_irq_demux_eint utility function is used in chained IRQ handler for EINT16-31 to handle multiplexed interrupts. Inlining it should improve the performance a bit. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
A bit in EINTxx_PEND register is set regardless of interrupt mask, which causes spurious interrupts. To avoid them, the read value of pending register must be masked with current interrupt mask manually. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
To mask GPIO/wakeup IRQ, the corresponding bit in mask register has to be set. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Tomasz Figa 提交于
Pins used as GPIO interrupts need to be configured as EINTs. This patch adds the required configuration code to exynos_gpio_irq_set_type, to set the pin as EINT when its interrupt trigger is configured. Signed-off-by: NTomasz Figa <t.figa@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 07 9月, 2012 1 次提交
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由 Thomas Abraham 提交于
Add information about the Exynos4210 pin banks and driver data which is used by the Samsung pinctrl driver. In addition to this, the support for external gpio and wakeup interrupt support is included and hooked up with the Samsung pinctrl driver. Signed-off-by: NThomas Abraham <thomas.abraham@linaro.org> Reviewed-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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