Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Anomaly 05000312 - Errors When SSYNC, CSYNC, or Loads to LT, LB and LC Registers Are Interrupted:

DESCRIPTION:
When instruction cache is enabled, erroneous behavior may occur when any of the following instructions are interrupted:

. CSYNC
• SSYNC
• LCx =
• LTx = (only when LCx is non-zero)
• LBx = (only when LCx is non-zero)

When this problem occurs, a variety of incorrect things could happen, including an illegal instruction exception. Additional errors could
show up as an exception, a hardware error, or an instruction that is valid but different than the one that was expected.

WORKAROUND:
Place a cli before all SSYNC, CSYNC, "LCx =", "LTx =", and "LBx =" instructions to disable interrupts, and place an sti after each of these
instructions to re-enable interrupts. When these instructions are executed in code that is already non-interruptible, the problem will not
occur.
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Config EBIU flash mode properly. EBIU_MODE EBIU_FCTL
EBIU_MBSCTL register should be configurd to Flash
mode.
Signed-off-by: NSonic Zhang <sonic.zhang@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NCliff Cai <cliff.cai@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Revert this patch:
move the init sections to the end of memory, so that after they
are free, run time memory is all continugous - this should help decrease
memory fragementation. When doing this, we also pack some of the other
sections a little closer together, to make sure we don't waste memory.
To make this happen, we need to rename the .data.init_task section to
.init_task.data, so it doesn't get picked up by the linker script glob.

Since it causes the kernel not to boot up with mtd filesystems.
Signed-off-by: NBernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NJie Zhang <jie.zhang@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

/*
 * CPUs often take a performance hit when accessing unaligned memory
 * locations. The actual performance hit varies, it can be small if the
 * hardware handles it or large if we have to take an exception and fix
 * it
 * in software.
 *
 * Since an ethernet header is 14 bytes network drivers often end up
 * with
 * the IP header at an unaligned offset. The IP header can be aligned by
 * shifting the start of the packet by 2 bytes. Drivers should do this
 * with:
 *
 * skb_reserve(NET_IP_ALIGN);
 *
 * The downside to this alignment of the IP header is that the DMA is
 * now
 * unaligned. On some architectures the cost of an unaligned DMA is high
 * and this cost outweighs the gains made by aligning the IP header.
 *
 * Since this trade off varies between architectures, we allow
 * NET_IP_ALIGN
 * to be overridden.
 */

This new function insl_16 allows to read form 32-bit IO and writes to
16-bit aligned memory. This is useful in above described scenario -
In particular with the AXIS AX88180 Gigabit Ethernet MAC.
Once the device is in 32-bit mode, reads from the RX FIFO always
decrements 4bytes.
While on the other side the destination address in SDRAM is always
16-bit aligned.
If we use skb_reserve(0) the receive buffer is 32-bit aligned but later
we hit a unaligned exception in the IP code.
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

If you need a 64 bit divide in the kernel, use asm/div64.h.
Revert the addition of udivdi3.

Cc: Bernd Schmidt <bernd.schmidt@analog.com>
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

The only user of get_wchan I was able to find is the proc fs - and proc
can't be built modular.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

The only user is the a.out support.

It was therefore removed prior to the blackfin merge from all
architectures not supporting a.out.

Currently, Blackfin doesn't suppport a.out.
Signed-off-by: NAdrian Bunk <bunk@kernel.org>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

i'm *reasonably* confident that this is a typo that should be fixed.
Signed-off-by: NRobert P. J. Day <rpjday@crashcourse.ca>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Blackfin arch: Dont use cs_change_per_word, since the AD7877 driver doesnt require it anymore; fix bus numbers, fix typos
Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Blackfin arch: change get_bf537_ether_addr() to bfin_get_ether_addr() since this is not BF537 specific and to better match other Blackfin-specific conventions
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Blackfin arch: sharing the board-specific MAC function does not make sense so move it into board-specific files
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

VDSP has double fault on core a/b inverted for BF561 -- bit 11 is core a while bit 12 is core b
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

since we have this always turned on now and dont want it off (and hasnt been an option in a while)
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

move the init sections to the end of memory, so that after they
are free, run time memory is all continugous - this should help decrease
memory fragementation. When doing this, we also pack some of the other
sections a little closer together, to make sure we don't waste memory.
To make this happen, we need to rename the .data.init_task section to
.init_task.data, so it doesn't get picked up by the linker script glob.
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Blackfin arch: add a compatible DOUBLE_FAULT define to enable resets on double faults in either core
Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMike Frysinger <michael.frysinger@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NJavier Herrero <jherrero@hvsistemas.es>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

https://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=1685

Ensure that cache/protection is turned back on when we get a
fault, and ensure that the initial population of the CPLB tables are
correct - that kernel is locked in CPLB tables
Signed-off-by: NRobin Getz <robin.getz@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>

Signed-off-by: NMichael Hennerich <michael.hennerich@analog.com>
Signed-off-by: NBryan Wu <bryan.wu@analog.com>