MMC_CLKGATE was once invented to save power by gating the bus clock at
request inactivity. At that time it served its purpose. The modern way to
deal with power saving for these scenarios, is by using runtime PM.

Nowadays, several host drivers have deployed runtime PM, but for those
that haven't and which still cares power saving at request inactivity,
it's certainly time to deploy runtime PM as it has been around for several
years now.

To simplify code to mmc core and thus decrease maintenance efforts, this
patch removes all code related to MMC_CLKGATE.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Reviewed-by: NLinus Walleij <linus.walleij@linaro.org>

Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Freescale eSDHC driver now supports both little-endian and
big-endian mode eSDHC IPs for ARM and PPC. So, MMC_SDHCI_OF_ESDHC
option needs to be reconfigured.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

To support little endian eSDHC controller, we redefine both BE and
LE IO accessors. In the new accessors, use ioread*/iowrite* instead
of in_be32/out_be32 and will select accessors according to endian
mode in probe function.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add another PCI ID for an Intel eMMC host controller.
Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

drivers/mmc/host/sdhci-pci-core.c:447:1-4: WARNING: end returns can be simpified

 Simplify a trivial if-return sequence.  Possibly combine with a
 preceding function call.

Generated by: scripts/coccinelle/misc/simple_return.cocci

CC: Ben Hutchings <ben@decadent.org.uk>
Signed-off-by: NFengguang Wu <fengguang.wu@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It has no external callers.
Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

sdhci-pci-o2micro.c contains no initialisation and its functions are only
called from shdci-pci.c, so there is no reason for it to be a separate
module, let alone or for it to always be built-in.

- Rename sdhci-pci.c to sdhci-pci-core.c so that the sdhci-pci module
  can be built from multiple source files
- Add sdhci-pci-o2micro.c to it
- Remove redundant exports
Signed-off-by: NBen Hutchings <ben@decadent.org.uk>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

According to hardware spec, validate DDR50 mode
for SDXC.
Signed-off-by: NWeijun Yang <york.yang@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

CMD19 tuning is also available for DDR50 mode.
Signed-off-by: NWeijun Yang <york.yang@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As SD Specifications Part1 Physical Layer Specification Version
3.01 says, CMD19 tuning is available for unlocked cards in transfer
state of 1.8V signaling mode. The small difference between v3.00
and 3.01 spec means that CMD19 tuning is also available for DDR50
mode.
Signed-off-by: NWeijun Yang <york.yang@csr.com>
Signed-off-by: NBarry Song <Baohua.Song@csr.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

MMC_IOC_CMD and MMC_IOC_MULTI_CMD ioctl() code currently bails on
any eMMC errors. However, in case there is any resp[] data, we
should attempt to copy resp[] back to user space. The user app
can then determine which command(s) failed in the MMC_IOC_MULTI_CMD
case AND/OR report better diagnostics in both cases.

Gwendal Grignou provided the idea and it was previously implemented
and tested on v3.18 ChromeOS kernel:
    https://chromium-review.googlesource.com/#/c/299956Signed-off-by: NGrant Grundler <grundler@chromium.org>
Reviewed-by: NHyung Taek Ryoo <hryoo@nvidia.com>
Reviewed-by: NGwendal Grignou <gwendal@chromium.org>
Tested-by: NDavid Riley <davidriley@chromium.org>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch add MMC_TIMING_UHS_SDR12 and MMC_TIMING_UHS_SDR25
for mmc_ios_show to show the ios->timing if mmc card runs under
these two modes.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Some sdio wifi modules have not been working reliable with the sunxi-mmc
host code. This turns out to be caused by starting new io-rw commands while
the card signals that it is still busy processing a previous command.

This commit adds card-busy detection to the sunxi-mmc driver which together
with recent core changes to check card-busy before starting io-rw commands
fixes the wifi reliability issues on the Cubietruck and other sunxi boards
using sdio wifi.
Reported-by: NEugene K <sigintmailru@gmail.com>
Suggested-by: NEugene K <sigintmailru@gmail.com>
Cc: Eugene K <sigintmailru@gmail.com>
Cc: Arend van Spriel <arend@broadcom.com>
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Some sdio wifi chips will not work properly if we try to start new
sdio-rw requests while the device is signalling that it is busy.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add a helper function to check if an opcode is a sd-io-rw-* opcode.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Certain eMMC devices allow vendor specific device information to be read
via a sequence of vendor commands. These vendor commands must be issued
in sequence and an atomic fashion. One way to support this would be to
add an ioctl function for sending a sequence of commands to the device
atomically as proposed here. These multi commands are simple array of
the existing mmc_ioc_cmd structure.

The structure passed via the ioctl uses a __u64 type to specify the number
of commands (so that the structure is aligned on a 64-bit boundary) and a
zero length array as a header for list of commands to be issued. The
maximum number of commands that can be sent is determined by
MMC_IOC_MAX_CMDS (which defaults to 255 and should be more than
sufficient).

This based upon work by Seshagiri Holi <sholi@nvidia.com>.
Signed-off-by: NSeshagiri Holi <sholi@nvidia.com>
Signed-off-by: NJon Hunter <jonathanh@nvidia.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Enable interrupt mode to detect card instead of polling mode for
ls1021a by removing the quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION.
This could improve data transferring performance and avoid the call
trace caused by polling card status sometime.
Signed-off-by: NYangbo Lu <yangbo.lu@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The simple power sequence provider sets a value for multiple GPIOs in one
go so it is better to use the API already provided by the GPIO descriptor
API instead of open coding the same logic.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Add MMC_CAP_RUNTIME_RESUME support to save resume time
Drop unnecessary SDC_ARG write
Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This patch add ios->drv_type for mmc_ios_show to show the
card's driver type.
Signed-off-by: NShawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.
Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com>
Acked-by: NTony Lindgren <tony@atomide.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

This platform driver has a OF device ID table but the OF module
alias information is not created so module autoloading won't work.
Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Use of_property_read_u32 instead of of_get_property with return value
checks and endianness conversion.
Signed-off-by: NTobias Klauser <tklauser@distanz.ch>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Drivers needs to export the OF id table and this be built into
the module or udev won't have the necessary information to autoload
the driver module when the device is registered via OF.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The goto is correct and the unreachable "return -EINVAL" should be
removed.
Signed-off-by: NDan Carpenter <dan.carpenter@oracle.com>
Acked-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

sdhci_init() will clear all irqs and set the needed irqs. So
logically sdhci_init() should be called before request irq.

If not, some irqs may be triggled and handled wrongly. Take
the following into consideration, after request irq, if
SDIO card interrupt enabled, a sd card in the sd slot will
trigger a mass of interrupt(SDHCI_INT_CARD_INT), because at
this time, the vmmc-regulator still not restore, no voltage
supply for the sd card, so the pin of data0~data3 change and
keep low, interrupt(SDHCI_INT_CARD_INT) will rise up ceaselessly.
Due to we already reguest irq, system will be busy in handling
this endless irq, can't response to other event.

So we should call sdhci_init() before request irq in sd resume.
Signed-off-by: NHaibo Chen <haibo.chen@freescale.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The driver prints if the data width is 8-bit but it's using a
binary OR instead of a binary AND so it will always report as
"is_8bit=Y" regardless of the flags in host->mmc->caps.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Reviewed-by: NRay Jui <rjui@broadcom.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The gpiod_get() function expands to gpiod_get_index() with index 0
so it's better to use it since is easier to read and more concise.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As there are no users of the __mmc_switch() API, except for the mmc core
itself, let's convert it from an exported function into an internal.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

They aren't needed and are just creating null statements so remove it.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

It's not needed an is just creating a null statement, so remove it.
Signed-off-by: NJavier Martinez Canillas <javier@osg.samsung.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Signed-off-by: NYousong Zhou <yszhou4tech@gmail.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

As mmc_claim_host() invokes pm_runtime_get_sync() for the mmc host device,
it's important that the host is kept claimed for *all* accesses to it via
the host_ops callbacks.

In some code paths for SDIO, particularly related to the PM support,
mmc_power_off|up() is invoked without keeping the host claimed. Let's fix
these.

Moreover, mmc_start|stop_host() also invokes mmc_power_off|up() without
claiming the host, let's fix these as well.
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>
Acked-by: NKishon Vijay Abraham I <kishon@ti.com>

Add an entry to the sdhci_acpi_uids list to detect the SD card
reader on the Asus X205Ta laptop.

dstd table:

Device (SDHC)
{
    Name (_ADR, Zero)  // _ADR: Address
    Name (_HID, "PNP0FFF")  // _HID: Hardware ID
    Name (_CID, "PNP0D40" /* SDA Standard Compliant SD Host Controller */)
    Name (_DDN, "Intel(R) SD Card Controller - 80860F16")  // _DDN: DOS Dev
    Name (_UID, 0x03)  // _UID: Unique ID
    Name (RDEP, Package (0x02)
Signed-off-by: NMichele Curti <michele.curti@gmail.com>
Acked-by: NAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

Suppose that we got a data crc error, and it triggers the mmc_reset.
mmc_reset will call mmc_send_status to see if HW reset was supported.
before issue CMD13, it will do retune, and if EMMC was in HS400 mode,
it will reduce frequency to 52Mhz firstly, then results in card init
was doing at 52Mhz.
The mmc_send_status was originally only done for mmc_test, should drop
it. And, rename the "eMMC hardware reset" to "Reset test", as we would
also be able to use the test for SD-cards.
Signed-off-by: NChaotian Jing <chaotian.jing@mediatek.com>
Suggested-by: NAdrian Hunter <adrian.hunter@intel.com>
Fixes: bd11e8bd ("mmc: core: Flag re-tuning is needed on CRC errors")
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The Atmel sdhci device needs the
SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST quirk. Without it, the
internal clock could never stabilised when changing the sd clock
frequency.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

The Atmel sdhci device needs a new quirk. sdhci_set_clock set the Clock
Control Register to 0 before computing the new value and writing it.
It disables the internal clock which causes a reset mecanism. If we
write the new value before this reset mecanism is done, it will prevent
the stabilisation of the internal clock, so a delay is needed. This
delay is about 2-3 cycles of the base clock. To be safe, a 1 ms delay is
used.
Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

In case of armada_38x_quirks error, all clocks should be cleaned-up, same
as after mv_conf_mbus_windows failure.
Signed-off-by: NMarcin Wojtas <mw@semihalf.com>
Cc: <stable@vger.kernel.org> # v4.2
Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>

According to 'FE-2946959' erratum the clock inversion option is
needed to support slow frequencies when the card input hold time
requirement is high. This setting is not required for high speed
MMC and might cause timing violation.
Signed-off-by: NNadav Haklai <nadavh@marvell.com>
Cc: <stable@vger.kernel.org> # v4.2
Reviewed-by: NGregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: NUlf Hansson <ulf.hansson@linaro.org>