- 24 10月, 2015 16 次提交
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由 Jean Delvare 提交于
The first part of the comment is wrong since November 2007, delete it. The second part of the comment is related to I2C_PEC, not I2C_SLAVE, so move it where it belongs. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Wolfram Sang <wsa@the-dreams.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jean Delvare 提交于
The ioctl is named I2C_RDWR for "I2C read/write". But references to it were misspelled "rdrw". Fix them. Signed-off-by: NJean Delvare <jdelvare@suse.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Guoying Zhang 提交于
In prima2 and atlas7, due to some hardware design issue. we need to adjust the divider ratio a little according to i2c bus frequency ranges. Since i2c is open drain interface that allows the slave to stall the transaction by holding the SCL line at '0', the RTL implementation is waiting for SCL feedback from the pin after setting it to High-Z ('1'). This wait adds to the high-time interval counter few cycles of the input synchronization (depending on the SCL_FILTER_REG field), and also the time it takes for the board pull-up resistor to rise the SCL line. For slow SCL settings these additions are negligible, but they start to affect the speed when clock is set to faster frequencies. This patch is based on the actual tests, and it makes SCL more accurate. Signed-off-by: NGuoying Zhang <Guoying.Zhang@csr.com> Signed-off-by: NBarry Song <Baohua.Song@csr.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Fabio Estevam 提交于
According to Documentation/i2c/fault-codes the response to a bus NACK should be -ENXIO, so fix the error code. Signed-off-by: NFabio Estevam <fabio.estevam@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jarkko Nikula 提交于
This patch adds the SMBUS PCI ID of Intel Broxton. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Mika Westerberg 提交于
Intel DNV SoC has the same legacy SMBus host controller than Intel Sunrisepoint PCH. It also has same iTCO watchdog on the bus. Add DNV PCI ID to the list of supported devices. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Liguo Zhang 提交于
mt65xx i2c controller initial setting will be cleared after system suspend, so we should init mt65xx i2c controller again when system resume. Signed-off-by: NLiguo Zhang <liguo.zhang@mediatek.com> Signed-off-by: NEddie Huang <eddie.huang@mediatek.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Gao Pan 提交于
Implement bus recovery methods for i2c-imx so we can recover from situations where SCL/SDA are stuck low. Once i2c bus SCL/SDA are stuck low during transfer, config the i2c pinctrl to gpio mode by calling pinctrl sleep set function, and then use GPIO to emulate the i2c protocol to send nine dummy clock to recover i2c device. After recovery, set i2c pinctrl to default group setting. Signed-off-by: NFugang Duan <B38611@freescale.com> Signed-off-by: NGao Pan <b54642@freescale.com> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
There is a 24c08 chip connected to i2c bus on Intel Galileo Gen2 board. Enable it via ACPI ID INT3499. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
On Intel Galileo Gen2 the GPIO expanders are connected to the i2c bus. For those devices the ACPI table has specific parameters that refer to an actual i2c host controller. Since MFD now copes with that specific configuration we have to provide a necessary information how to distinguish devices in ACPI namespace. Here the _ADR values are provided. Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
On Intel Galileo boards the GPIO expander is connected to i2c bus. Moreover it is able to generate interrupt, but interrupt line is connected to GPIO. That's why we have to have GPIO driver in place when we will probe i2c host with device connected to it. Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
There is at least one board on the market, i.e. Intel Galileo Gen2, that uses _ADR to distinguish the devices under one actual device. Due to this we have to improve the quirk in the MFD core to handle that board. Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: NLee Jones <lee.jones@linaro.org> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Masahiro Yamada 提交于
Add support for on-chip I2C controller used on newer UniPhier SoCs such as PH1-Pro4, PH1-Pro5, etc. This adapter is equipped with 8-depth TX/RX FIFOs. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Masahiro Yamada 提交于
Add support for on-chip I2C controller used on old UniPhier SoCs such as PH1-LD4, PH1-sLD8, etc. This adapter is so simple that it has no FIFO in it. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Ken Xue 提交于
The patch reverts commit a445900c (i2c: designware: Add support for AMD I2C controller). It never worked anyhow because it did not register a proper clkdev. Since kernel 4.1 starts to support APD, there is no need to get freq from id->driver_data for AMD0010. clkdev is supposed to be already registered in APD. So, revert old design and make AMD0010 looks like other ones. Signed-off-by: NKen Xue <Ken.Xue@amd.com> Signed-off-by: NXiangliang Yu <Xiangliang.Yu@amd.com> Acked-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Shaohui Xie 提交于
Signed-off-by: NShaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: NHou Zhiqiang <B48286@freescale.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 22 10月, 2015 2 次提交
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由 Cyrille Pitchen 提交于
In some cases a NACK interrupt may be pending in the Status Register (SR) as a result of a previous transfer. However at91_do_twi_transfer() did not read the SR to clear pending interruptions before starting a new transfer. Hence a NACK interrupt rose as soon as it was enabled again at the I2C controller level, resulting in a wrong sequence of operations and strange patterns of behaviour on the I2C bus, such as a clock stretch followed by a restart of the transfer. This first issue occurred with both DMA and PIO write transfers. Also when a NACK error was detected during a PIO write transfer, the interrupt handler used to wrongly start a new transfer by writing into the Transmit Holding Register (THR). Then the I2C slave was likely to reply with a second NACK. This second issue is fixed in atmel_twi_interrupt() by handling the TXRDY status bit only if both the TXCOMP and NACK status bits are cleared. Tested with a at24 eeprom on sama5d36ek board running a linux-4.1-at91 kernel image. Adapted to linux-next. Reported-by: NPeter Rosin <peda@lysator.liu.se> Signed-off-by: NCyrille Pitchen <cyrille.pitchen@atmel.com> Signed-off-by: NLudovic Desroches <ludovic.desroches@atmel.com> Tested-by: NPeter Rosin <peda@lysator.liu.se> Signed-off-by: NWolfram Sang <wsa@the-dreams.de> Fixes: 93563a6a ("i2c: at91: fix a race condition when using the DMA controller") Cc: stable@vger.kernel.org #4.1
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由 Jarkko Nikula 提交于
Commit ("i2c: designware: Rename platform driver probe and PM functions") introduced "'dw_i2c_plat_prepare' undeclared here" and "'dw_i2c_plat_complete' undeclared here" build errors when CONFIG_PM_SLEEP is not set. Fix this by renaming NULL defined dw_i2c_prepare and dw_i2c_complete PM hooks to dw_i2c_plat_prepare and dw_i2c_plat_complete since this was obviously missing from the commit. Reported-by: Nkbuild test robot <fengguang.wu@intel.com> Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 21 10月, 2015 7 次提交
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Luis de Bethencourt 提交于
This platform driver has a OF device ID table but the OF module alias information is not created so module autoloading won't work. Signed-off-by: NLuis de Bethencourt <luisbg@osg.samsung.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Geert Uytterhoeven 提交于
Since commit 4baadb9e ("ARM: shmobile: r8a7778: remove obsolete setup code"), Renesas R-Car SoCs are only supported in generic DT-only ARM multi-platform builds. The driver doesn't need to use platform data anymore, hence remove platform data configuration. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> [wsa: removed now unused ret value and cast to proper enum type] Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Enable the I2C core for this SoC. It is compitable to Gen2 SoCs, so reuse the settings. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Wolfram Sang 提交于
Enable the I2C core for this SoC. I add a new type because this version has new features (e.g. DMA) which will be added somewhen later. Signed-off-by: NWolfram Sang <wsa+renesas@sang-engineering.com> Tested-by: NKuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 20 10月, 2015 11 次提交
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由 Max Filippov 提交于
This allows using OpenCores I2C controller attached to its host in native-endian mode with bi-endian CPUs. Example of such system is Xtensa XTFPGA platform. Acked-by: NPeter Korsgaard <peter@korsgaard.com> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Manuel Lauss 提交于
The i2c-au1550 driver has to program various setup and hold times for the sda/scl signals by hand. The current values seem to be working best when the driver is supplied with 50MHz, however on the DB1300 board 48MHz is the closest we can get to it, and the timings are a bit too tight for that, leading to the last bit of a transmission sometimes being swallowed. This manifests itself in wrong readings of the ne1619 sensor and inability to configure the wm8731 i2s codec. With the relaxed timings, both the sensor and the i2s codec can now be accessed more reliably over a wider range of I2C block input frequencies. Verified on DB1200, DB1300 and DB1550 boards. Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Barry Song 提交于
This code is repeated in probe: i2c_dev->adapter.algo = &tegra_i2c_algo; Cc: Donglin Peng <pengdonglin137@163.com> Signed-off-by: NBarry Song <21cnbao@gmail.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Alexander Sverdlin 提交于
According to "KeyStone Architecture Inter-IC Control Bus User Guide", fixed additive part of frequency divisors (referred as "d" in the code and datasheet) always equals to 6, independent of module clock prescaler. module clock frequency master clock frequency = ---------------------- (ICCL + 6) + (ICCH + 6) It was not the case with original Davinci IP. Introduce new compatible property "ti,keystone-i2c", which triggers special handling in the driver. Without this change Keystone-based systems (having 204.8MHz input clock) choose prescaler 29 (PSC=28). Using d=5 in this case leads to bus bitrate ~353kHz instead of requested 400kHz. After correction, assuming d=6 bus rate is ~392kHz. This gives ~11% transfer rate increase. Signed-off-by: NAlexander Sverdlin <alexander.sverdlin@nokia.com> Reviewed-by: NGrygorii Strashko <grygorii.strashko@ti.com> Tested-by: NHemanth Guruva Reddy <hemanth.guruva_reddy@nokia.com> Tested-by: NLukasz Gemborowski <lukasz.gemborowski@nokia.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
Issue the warning in all error paths when unable to register MSI or its handler. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
Propagate actual return code when requesting interrupt fails. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
struct pci_dev already has a flag to track if MSI is enabled or not. Use it directly. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
There is no need to repeat the work that is already done in the PCI driver core. Remove suspend and resume callbacks. Note that there is no more calls performed to enable or disable a PCI device during suspend-resume cycle. Nowadays they seems to be superfluous. Someone can read more in [1]. [1] https://www.kernel.org/doc/ols/2009/ols2009-pages-319-330.pdfSigned-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
pcim_release() will release any requested region. There is no need to duplicate this effort in the driver. Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Andy Shevchenko 提交于
This fixes the code to suppress sparse warnings like: drivers/i2c/busses/i2c-ismt.c:725:36: warning: incorrect type in argument 2 (different address spaces) drivers/i2c/busses/i2c-ismt.c:725:36: expected void volatile [noderef] <asn:2>*addr drivers/i2c/busses/i2c-ismt.c:725:36: got void * Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: NMika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Mika Westerberg 提交于
The way we currently scan I2C devices behind an I2C host controller does not work in cases where the I2C device in question is not declared directly below the host controller ACPI node. This is perfectly legal according the ACPI 6.0 specification and some existing systems are doing this. To be able to enumerate all devices which are connected to a certain I2C host controller we need to rework the current I2C scanning routine a bit. Instead of scanning directly below the host controller we scan the whole ACPI namespace for present devices with valid I2cSerialBus() connection pointing to the host controller in question. Signed-off-by: NMika Westerberg <mika.westerberg@linux.intel.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NAndy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: NDustin Byford <dustin@cumulusnetworks.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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- 15 10月, 2015 4 次提交
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由 Jarkko Nikula 提交于
There is some code duplication in i2c-designware-platdrv and i2c-designware-pcidrv probe functions. What is even worse that duplication requires i2c_dw_xfer(), i2c_dw_func() and i2c_dw_isr() i2c-designware-core functions to be exported. Therefore move common code into new i2c_dw_probe() and make functions above local to i2c-designware-core. While merging the code patch does following functional changes: - I2C Adapter name will be "Synopsys DesignWare I2C adapter". Previously it was used for platform and ACPI devices but PCI device used "i2c-designware-pci". - Using device name for interrupt name. Previous it was platform device name, ACPI device name or "i2c-designware-pci". - Error code from devm_request_irq() and i2c_add_numbered_adapter() will be printed in case of error. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jarkko Nikula 提交于
Make it easier to distinguish between i2c-designware-platdrv and i2c-designware-core functions and to be consistent with i2c-designware-pcidrv. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jarkko Nikula 提交于
dw_readl() and dw_writel() are not used outside of i2c-designware-core and they are not exported so make them static and remove their forward declaration. Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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由 Jarkko Nikula 提交于
i2c_dw_is_enabled() became unused by the commit be58eda7 ("i2c: designware-pci: Cleanup driver power management") and i2c_dw_enable() by the commit 3a48d1c0 ("i2c: prevent spurious interrupt on Designware controllers"). Signed-off-by: NJarkko Nikula <jarkko.nikula@linux.intel.com> Signed-off-by: NWolfram Sang <wsa@the-dreams.de>
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