1. 18 5月, 2008 2 次提交
    • T
      x86: disable mwait for AMD family 10H/11H CPUs · e9623b35
      Thomas Gleixner 提交于
      The previous revert of 0c07ee38 left
      out the mwait disable condition for AMD family 10H/11H CPUs.
      
      Andreas Herrman said:
      
      It depends on the CPU. For AMD CPUs that support MWAIT this is wrong.
      Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings then
      depend on a clock divisor and current Pstate of the core.
      
      If all cores of a processor are in halt state (C1) the processor can
      enter the C1E (C1 enhanced) state. If mwait is used this will never
      happen.
      
      Thus HLT saves more power than MWAIT here.
      
      It might be best to switch off the mwait flag for these AMD CPU
      families like it was introduced with commit
      f039b754 (x86: Don't use MWAIT on AMD
      Family 10)
      
      Re-add the AMD families 10H/11H check and disable the mwait usage for
      those.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      e9623b35
    • I
      x86: remove mwait capability C-state check · a738d897
      Ingo Molnar 提交于
      Vegard Nossum reports:
      
      | powertop shows between 200-400 wakeups/second with the description
      | "<kernel IPI>: Rescheduling interrupts" when all processors have load (e.g.
      | I need to run two busy-loops on my 2-CPU system for this to show up).
      |
      | The bisect resulted in this commit:
      |
      | commit 0c07ee38
      | Date:   Wed Jan 30 13:33:16 2008 +0100
      |
      |     x86: use the correct cpuid method to detect MWAIT support for C states
      
      remove the functional effects of this patch and make mwait unconditional.
      
      A future patch will turn off mwait on specific CPUs where that causes
      power to be wasted.
      Bisected-by: NVegard Nossum <vegard.nossum@gmail.com>
      Tested-by: NVegard Nossum <vegard.nossum@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a738d897
  2. 27 4月, 2008 1 次提交
    • P
      fix idle (arch, acpi and apm) and lockdep · 7f424a8b
      Peter Zijlstra 提交于
      OK, so 25-mm1 gave a lockdep error which made me look into this.
      
      The first thing that I noticed was the horrible mess; the second thing I
      saw was hacks like: 71e93d15
      
      The problem is that arch idle routines are somewhat inconsitent with
      their IRQ state handling and instead of fixing _that_, we go paper over
      the problem.
      
      So the thing I've tried to do is set a standard for idle routines and
      fix them all up to adhere to that. So the rules are:
      
        idle routines are entered with IRQs disabled
        idle routines will exit with IRQs enabled
      
      Nearly all already did this in one form or another.
      
      Merge the 32 and 64 bit bits so they no longer have different bugs.
      
      As for the actual lockdep warning; __sti_mwait() did a plainly un-annotated
      irq-enable.
      Signed-off-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
      Tested-by: NBob Copeland <me@bobcopeland.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7f424a8b
  3. 20 4月, 2008 3 次提交