- 09 5月, 2014 1 次提交
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由 Arnd Bergmann 提交于
Commit 4df42de9d3e "gpio: omap: add a GPIO_OMAP option instead of using ARCH_OMAP" made it possible to build OMAP kernels without the GPIO driver, which at least on OMAP2 and OMAP3 causes build errors because of functions used by the platform power management code: arch/arm/mach-omap2/built-in.o: In function `omap_sram_idle': arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_prepare_for_idle' arch/arm/mach-omap2/pm24xx.c:129: undefined reference to `omap2_gpio_resume_after_idle' We presumably always want the GPIO driver on OMAP, so this adds a slightly broader dependency and only allows disabling the driver only when no OMAP2PLUS platform is selected. However, it seems entirely reasonable to include the driver in build tests on other platforms, so we should also allow building it for COMPILE_TEST builds and select the required GENERIC_IRQ_CHIP that may not already be enabled on other platforms. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Acked-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 04 5月, 2014 4 次提交
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由 Javier Martinez Canillas 提交于
Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
Using the BIT() macro instead of shifting bits makes the code less error prone and also more readable. Signed-off-by: NJavier Martinez Canillas <javier@dowhile0.org> Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 03 5月, 2014 2 次提交
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由 Thierry Reding 提交于
Add the GPIO-related device-managed functions to the list of functions in Documentation/driver-model/devres.txt. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
The function is called gpiod_get(), not gpio_get(). Fix the kernel-doc comment to match the name. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 4月, 2014 29 次提交
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由 Thierry Reding 提交于
Many bindings use the -gpio suffix in property names. Support this in addition to the -gpios suffix when requesting GPIOs using the new descriptor-based API. Signed-off-by: NThierry Reding <treding@nvidia.com> Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Yegor Yefremov 提交于
This patch implements gpio_chip's get_direction() routine, that lets other drivers get particular GPIOs direction using struct gpio_desc. Signed-off-by: NYegor Yefremov <yegorslists@googlemail.com> Acked-by: NJavier Martinez Canillas <javier@dowhile0.org> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Reviewed-by: NKevin Hilman <khilman@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Thierry Reding 提交于
of_find_gpio() is always called under an IS_ENABLED(CONFIG_OF), so the dummy implementation provided for !OF configurations is not needed. Signed-off-by: NThierry Reding <treding@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Some GPIO irqchip drivers exploit the irqdomain mapping function to set up the IRQ default type in the hardware, make sure that if we pass IRQ_TYPE_NONE, no hardware setup whatsoever takes place (this should be the norm) until later when the IRQ gets utilized. Cc: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> Cc: linux-omap <linux-omap@vger.kernel.org> Tested-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: NJavier Martinez Canillas <javier@dowhile0.org> Tested-by: NNishanth Menon <nm@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
This saves a few unwind code. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NFlorian Fainelli <florian@openwrt.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
This is just enough to automatically enable the functional clock, if present. Clock management during suspend/resume is still to be added. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-gpio@vger.kernel.org Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Make the module alias match the platform device name, so gpio-kempld module should now autoload correctly. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Reviewed-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Geert Uytterhoeven 提交于
Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Cc: linux-gpio@vger.kernel.org Cc: devicetree@vger.kernel.org Acked-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
The memory for ts is allocated by devm_kzalloc now, so the kfree is not required. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Acked-by: NJuergen Beisert <jbe@pengutronix.de> Reviewed-by: NJingoo Han <jg1.han@samsung.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Alexander Shiyan 提交于
This patch converts GE I/O FPGA GPIO driver to platform driver. Signed-off-by: NAlexander Shiyan <shc_work@mail.ru> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
As demonstrated by commit 390d82e3 "gpiolib: ACPI: remove gpio_to_desc() usage" gpio_to_desc() must die. Replace one of its usage by the newly-introduced gpiochip_get_desc() function. Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
Read gpio output value from ZEVIO_GPIO_OUTPUT. The spin_lock is required to ensure the direction is not changed before reading input/ouput value. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Another feature that is duplicated in a number of GPIO irqchips is that these cascades IRQs are assigned their own lock class so as to avoid warnings about lockdep recursions. Do this also in the generic GPIO irqchip helpers for smooth transition to this core infrastructure. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Daniel Krueger 提交于
According to the datasheet, writing to the level register has no effect when GPIO is programmed as input. Actually the the level register is read-only when configured as input. Thus presetting the output level before switching to output is _NOT_ possible. Any writes are lost! Hence we set the level after configuring the GPIO as output. But we cannot prevent a short low pulse if direction is set to high and an external pull-up is connected. Signed-off-by: NDaniel Krueger <daniel.krueger@systec-electronic.com> Signed-off-by: NAlexander Stein <alexander.stein@systec-electronic.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Axel Lin 提交于
This is a DT-only driver and it will be built only when CONFIG_OF is set. So it's pointless to use of_match_ptr. Signed-off-by: NAxel Lin <axel.lin@ingics.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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The driver calls irq_alloc_domain_generic_chips() which creates a gc and adds it to gc_list. The driver later then calls irq_setup_generic_chip() which also initializes the gc and adds it to the gc_list() and this corrupts the list. Enable LIST_DEBUG and you see the kernel complain. This isn't required, irq_alloc_domain_generic_chips() did the init. Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Tested-by: NAlan Tull <delicious.quinoa@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
I've been maintaining this driver by fixing all issues found while migrating OMAP2+ towards Device Tree based booting and keeping it up-to-date by using the latest infraestructure that is provided by the GPIO subsystem. It would be nice if people know that I care about this driver and put me in copy when sending patches for it. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
Converts the GPIO OMAP driver to register its chained irq handler and irqchip using the helpers in the gpiolib core. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The ARCH_OMAP config option was used to built the GPIO OMAP driver but this is not consistent with the rest of the GPIO drivers that have their own Kconfig option. Also, this make it harder to add dependencies or reverse dependencies (i.e: select) since that would mean touching the sub-arch config option. So is better to add a boolean Kconfig option for this driver that defaults to true if ARCH_OMAP is enabled. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The gpiochip_add() function can fail if the chip cannot be registered so the return value has to be checked and the error propagated in case it happens. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Javier Martinez Canillas 提交于
The GPIO OMAP driver supports different OMAP SoC families and not all of them have the needed support to use the linear IRQ domain mapping like OMAP1 that use the legacy domain mapping. But this special check is not necessary since the simple IRQ domain mapping is able to handle both cases. Having a zero IRQ offset will be interpreted as a linear domain case while a non-zero value will be interpreted as a legacy domain case. Signed-off-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Jean Delvare 提交于
GPIO_TIMBERDALE doesn't need an explicit dependency on HAS_IOMEM, because it depends on MFD_TIMBERDALE which itself depends on HAS_IOMEM already. Signed-off-by: NJean Delvare <jdelvare@suse.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
This adds some documentation about the GPIO irqchips, what types exist etc. Acked-by: NAlexandre Courbot <acourbot@nvidia.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Now that the gpiolib irqchip helpers can support nested, threaded IRQ handlers, switch the TC3589x driver over to using this new infrastructure. Tested on the Ux500. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
The static IRQ base is not used on any platforms with this chip (only Ux500). Get rid of it forever, and rely on dynamic IRQ descriptor allocation. Cc: Samuel Ortiz <sameo@linux.intel.com> Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Grab state container and irq using the devm_* functions and save some lines of hairy clean-up code. Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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由 Linus Walleij 提交于
Some off-chip GPIO expanders need to be communicated by I2C or SPI traffic, but may still support IRQs. By the sleeping nature of such buses, such IRQ handlers need to be threaded. Support such handlers in the gpiochip irqchip helpers by flagging IRQs as threaded if the .can_sleep property of the gpiochip is true. Helpfully deny registration of chained IRQ handlers if the .can_sleep property is set, as such chips will invariably need a nested handler rather than a chained handler. Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 28 4月, 2014 4 次提交
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由 Linus Torvalds 提交于
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由 Will Deacon 提交于
The asm-generic, big-endian version of zero_bytemask creates a mask of bytes preceding the first zero-byte by left shifting ~0ul based on the position of the first zero byte. Unfortunately, if the first (top) byte is zero, the output of prep_zero_mask has only the top bit set, resulting in undefined C behaviour as we shift left by an amount equal to the width of the type. As it happens, GCC doesn't manage to spot this through the call to fls(), but the issue remains if architectures choose to implement their shift instructions differently. An example would be arch/arm/ (AArch32), where LSL Rd, Rn, #32 results in Rd == 0x0, whilst on arch/arm64 (AArch64) LSL Xd, Xn, #64 results in Xd == Xn. Rather than check explicitly for the problematic shift, this patch adds an extra shift by 1, replacing fls with __fls. Since zero_bytemask is never called with a zero argument (has_zero() is used to check the data first), we don't need to worry about calling __fls(0), which is undefined. Cc: <stable@vger.kernel.org> Cc: Victor Kamensky <victor.kamensky@linaro.org> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Linus Torvalds 提交于
This merges the patch to fix possible loss of dirty bit on munmap() or madvice(DONTNEED). If there are concurrent writers on other CPU's that have the unmapped/unneeded page in their TLBs, their writes to the page could possibly get lost if a third CPU raced with the TLB flush and did a page_mkclean() before the page was fully written. Admittedly, if you unmap() or madvice(DONTNEED) an area _while_ another thread is still busy writing to it, you deserve all the lost writes you could get. But we kernel people hold ourselves to higher quality standards than "crazy people deserve to lose", because, well, we've seen people do all kinds of crazy things. So let's get it right, just because we can, and we don't have to worry about it. * safe-dirty-tlb-flush: mm: split 'tlb_flush_mmu()' into tlb flushing and memory freeing parts
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git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs由 Linus Torvalds 提交于
Pull btrfs fixes from Chris Mason. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux-btrfs: Btrfs: limit the path size in send to PATH_MAX Btrfs: correctly set profile flags on seqlock retry Btrfs: use correct key when repeating search for extent item Btrfs: fix inode caching vs tree log Btrfs: fix possible memory leaks in open_ctree() Btrfs: avoid triggering bug_on() when we fail to start inode caching task Btrfs: move btrfs_{set,clear}_and_info() to ctree.h btrfs: replace error code from btrfs_drop_extents btrfs: Change the hole range to a more accurate value. btrfs: fix use-after-free in mount_subvol()
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