- 14 1月, 2014 8 次提交
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由 Rafael J. Wysocki 提交于
There are multiple PCI device addition and removal code paths that may be run concurrently with the generic PCI bus rescan and device removal that can be triggered via sysfs. If that happens, it may lead to multiple different, potentially dangerous race conditions. The most straightforward way to address those problems is to run the code in question under the same lock that is used by the generic rescan/remove code in pci-sysfs.c. To prepare for those changes, move the definition of the global PCI remove/rescan lock to probe.c and provide global wrappers, pci_lock_rescan_remove() and pci_unlock_rescan_remove(), allowing drivers to manipulate that lock. Also provide pci_stop_and_remove_bus_device_locked() for the callers of pci_stop_and_remove_bus_device() who only need to hold the rescan/remove lock around it. Signed-off-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Put empty or trivial inline stub functions on one line when they fit. No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Consistently use the: #ifdef CONFIG_PCI_FOO int pci_foo(...); #else static inline int pci_foo(...) { return -1; } #endif pattern, instead of sometimes using "#ifndef CONFIG_PCI_FOO". No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Stephen Hemminger 提交于
Using 'make namespacecheck' identify code which should be declared static. Checked for users in other driver/archs as well. Compile tested only. This stops exporting the following interfaces to modules: pci_target_state() pci_load_saved_state() [bhelgaas: retained pci_find_next_ext_capability() and pci_cfg_space_size()] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This removes this unused and deprecated interface: alloc_pci_dev() [bhelgaas: split to separate patch] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts part of f46753c5 ("PCI: introduce pci_slot") and d25b7c8d ("PCI: rename pci_update_slot_number to pci_renumber_slot"), removing this interface: pci_renumber_slot() [bhelgaas: split to separate patch, add historical link from Alex] Link: http://lkml.kernel.org/r/20081009043140.8678.44164.stgit@bob.kioSigned-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NAlex Chiang <achiang@canonical.com>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts part of 3e1b1600 ("ACPI/PCI: PCIe ASPM _OSC support capabilities called when root bridge added"), removing this interface: pcie_aspm_enabled() [bhelgaas: split to separate patch] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Andrew Patterson <andrew.patterson@hp.com>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts db567943 ("PCI: add interface to set visible size of VPD"), removing this interface: pci_vpd_truncate() [bhelgaas: split to separate patch, also remove prototype from pci.h] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 11 1月, 2014 3 次提交
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts b48d4425 ("PCI: add ID-based ordering enable/disable support"), removing these interfaces: pci_enable_ido() pci_disable_ido() [bhelgaas: split to separate patch, also remove prototypes from pci.h] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Jesse Barnes <jbarnes@virtuousgeek.org>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts 48a92a81 ("PCI: add OBFF enable/disable support"), removing these interfaces: pci_enable_obff() pci_disable_obff() [bhelgaas: split to separate patch, also remove prototypes from pci.h] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Jesse Barnes <jbarnes@virtuousgeek.org>
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由 Stephen Hemminger 提交于
My philosophy is unused code is dead code. And dead code is subject to bit rot and is a likely source of bugs. Use it or lose it. This reverts 51c2e0a7 ("PCI: add latency tolerance reporting enable/disable support"), removing these interfaces: pci_enable_ltr() pci_disable_ltr() pci_set_ltr() [bhelgaas: split to separate patch, also remove prototypes from pci.h] Signed-off-by: NStephen Hemminger <stephen@networkplumber.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> CC: Jesse Barnes <jbarnes@virtuousgeek.org>
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- 08 1月, 2014 1 次提交
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由 Yinghai Lu 提交于
When allocating space for 32-bit BARs, we previously limited RESOURCE addresses so they would fit in 32 bits. However, the BUS address need not be the same as the resource address, and it's the bus address that must fit in the 32-bit BAR. This patch adds: - pci_clip_resource_to_region(), which clips a resource so it contains only the range that maps to the specified bus address region, e.g., to clip a resource to 32-bit bus addresses, and - pci_bus_alloc_from_region(), which allocates space for a resource from the specified bus address region, and changes pci_bus_alloc_resource() to allocate space for 64-bit BARs from the entire bus address region, and space for 32-bit BARs from only the bus address region below 4GB. If we had this window: pci_root HWP0002:0a: host bridge window [mem 0xf0180000000-0xf01fedfffff] (bus address [0x80000000-0xfedfffff]) we previously could not put a 32-bit BAR there, because the CPU addresses don't fit in 32 bits. This patch fixes this, so we can use this space for 32-bit BARs. It's also possible (though unlikely) to have resources with 32-bit CPU addresses but bus addresses above 4GB. In this case the previous code would allocate space that a 32-bit BAR could not map. Remove PCIBIOS_MAX_MEM_32, which is no longer used. [bhelgaas: reworked starting from http://lkml.kernel.org/r/1386658484-15774-3-git-send-email-yinghai@kernel.org] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 04 1月, 2014 4 次提交
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由 Alexander Gordeev 提交于
This adds pci_enable_msi_range(), which supersedes the pci_enable_msi() and pci_enable_msi_block() MSI interfaces. It also adds pci_enable_msix_range(), which supersedes the pci_enable_msix() MSI-X interface. The old interfaces have three categories of return values: negative: failure; caller should not retry positive: failure; value indicates number of interrupts that *could* have been allocated, and caller may retry with a smaller request zero: success; at least as many interrupts allocated as requested It is error-prone to handle these three cases correctly in drivers. The new functions return either a negative error code or a number of successfully allocated MSI/MSI-X interrupts, which is expected to lead to clearer device driver code. pci_enable_msi(), pci_enable_msi_block() and pci_enable_msix() still exist unchanged, but are deprecated and may be removed after callers are updated. [bhelgaas: tweak changelog] Suggested-by: NBen Hutchings <bhutchings@solarflare.com> Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NTejun Heo <tj@kernel.org>
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由 Alexander Gordeev 提交于
This creates an MSI-X counterpart for pci_msi_vec_count(). Device drivers can use this function to obtain maximum number of MSI-X interrupts the device supports and use that number in a subsequent call to pci_enable_msix(). pci_msix_vec_count() supersedes pci_msix_table_size() and returns a negative errno if device does not support MSI-X interrupts. After this update, callers must always check the returned value. The only user of pci_msix_table_size() was the PCI-Express port driver, which is also updated by this change. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NTejun Heo <tj@kernel.org>
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由 Alexander Gordeev 提交于
The new pci_msi_vec_count() interface makes pci_enable_msi_block_auto() superfluous. Drivers can use pci_msi_vec_count() to learn the maximum number of MSIs supported by the device, and then call pci_enable_msi_block(). pci_enable_msi_block_auto() was introduced recently, and its only user is the AHCI driver, which is also updated by this change. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NTejun Heo <tj@kernel.org>
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由 Alexander Gordeev 提交于
Device drivers can use this interface to obtain the maximum number of MSI interrupts the device supports and use that number, e.g., in a subsequent call to pci_enable_msi_block(). Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NTejun Heo <tj@kernel.org>
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- 22 12月, 2013 2 次提交
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由 Bjorn Helgaas 提交于
We store BAR information as a struct resource, which contains the CPU address, not the bus address. Drivers often need the bus address, and there's currently no convenient way to get it, so they often read the BAR directly, or use the resource address (which doesn't work if there's any translation between CPU and bus addresses). Add pci_bus_address() to make this convenient. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yinghai Lu 提交于
These interfaces: pcibios_resource_to_bus(struct pci_dev *dev, *bus_region, *resource) pcibios_bus_to_resource(struct pci_dev *dev, *resource, *bus_region) took a pci_dev, but they really depend only on the pci_bus. And we want to use them in resource allocation paths where we have the bus but not a device, so this patch converts them to take the pci_bus instead of the pci_dev: pcibios_resource_to_bus(struct pci_bus *bus, *bus_region, *resource) pcibios_bus_to_resource(struct pci_bus *bus, *resource, *bus_region) In fact, with standard PCI-PCI bridges, they only depend on the host bridge, because that's the only place address translation occurs, but we aren't going that far yet. [bhelgaas: changelog] Signed-off-by: NYinghai Lu <yinghai@kernel.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 21 12月, 2013 3 次提交
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由 Bjorn Helgaas 提交于
Struct pci_bus_region contains bus addresses, which are type dma_addr_t, not resource_size_t. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Alexander Gordeev 提交于
Make pci_enable_msi_block(), pci_enable_msi_block_auto() and pci_enable_msix() consistent with regard to the type of 'nvec' argument. Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NTejun Heo <tj@kernel.org>
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由 Alexander Gordeev 提交于
Suggested-by: NBen Hutchings <bhutchings@solarflare.com> Signed-off-by: NAlexander Gordeev <agordeev@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NTejun Heo <tj@kernel.org>
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- 20 12月, 2013 1 次提交
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由 Greg Kroah-Hartman 提交于
The PCI MSI sysfs code is a mess with kobjects for things that don't really need to be kobjects. This patch creates attributes dynamically for the MSI interrupts instead of using kobjects. Note, this removes a directory from sysfs. Old MSI kobjects: pci_device └── msi_irqs └── 40 └── mode New MSI attributes: pci_device └── msi_irqs └── 40 As there was only one file "mode" with the kobject model, the interrupt number is now a file that returns the "mode" of the interrupt (msi vs. msix). Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NNeil Horman <nhorman@tuxdriver.com>
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- 18 12月, 2013 3 次提交
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由 Alex Williamson 提交于
While we don't really have any infrastructure for making use of VC support, the system BIOS can configure the topology to non-default VC values prior to boot. This may be due to silicon bugs, desire to reserve traffic classes, or perhaps just BIOS bugs. When we reset devices, the VC configuration may return to default values, which can be incompatible with devices upstream. For instance, Nvidia GRID cards provide a PCIe switch and some number of GPUs, all supporting VC. The power-on default for VC is to support TC0-7 across VC0, however some platforms will only enable TC0/VC0 mapping across the topology. When we do a secondary bus reset on the downstream switch port, the GPU is reset to a TC0-7/VC0 mapping while the opposite end of the link only enables TC0/VC0. If the GPU attempts to use TC1-7, it fails. This patch attempts to provide complete support for VC save/restore, even beyond the minimally required use case above. This includes save/restore and reload of the arbitration table, save/restore and reload of the port arbitration tables, and re-enabling of the channels for VC, VC9, and MFVC capabilities. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Alex Williamson 提交于
Current save/restore is specific to standard capabilities. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Alex Williamson 提交于
We currently have two instance of this loop which waits for a pending bit to clear in a status dword. Generalize the function for future users. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 14 12月, 2013 1 次提交
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由 Joe Perches 提交于
Prefer use of the direct definition of struct pci_device_id instead of indirection via macro DEFINE_PCI_DEVICE_TABLE. Update the PCI documentation to deprecate DEFINE_PCI_DEVICE_TABLE. Update checkpatch adding --fix option. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Reviewed-by: NJingoo Han <jg1.han@samsung.com>
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- 26 11月, 2013 1 次提交
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由 Michal Marek 提交于
Pasting the verbatim PCI_(VENDOR|DEVICE)_* macros in the __pci_fixup_* symbol names results in insanely long names such as __pci_fixup_resumePCI_VENDOR_ID_SERVERWORKSPCI_DEVICE_ID_SERVERWORKS_HT1000SBquirk_disable_broadcom_boot_interrupt When Link-Time Optimization adds its numeric suffix to such symbol, it overflows the namebuf[KSYM_NAME_LEN] array in kernel/kallsyms.c. Use the line number instead to create (nearly) unique symbol names. Reported-by: NJoe Mario <jmario@redhat.com> Signed-off-by: NMichal Marek <mmarek@suse.cz> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Cc: Andi Kleen <ak@linux.intel.com>
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- 15 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
Fix whitespace, capitalization, and spelling errors. No functional change. I know "busses" is not an error, but "buses" was more common, so I used it consistently. Signed-off-by: Marta Rybczynska <rybczynska@gmail.com> (pci_reset_bridge_secondary_bus()) Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NRafael J. Wysocki <rafael.j.wysocki@intel.com>
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- 08 11月, 2013 1 次提交
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由 Bjorn Helgaas 提交于
This adds a pci_upstream_bridge() interface to find the PCI-to-PCI bridge upstream from a device. This is typically just "dev->bus->self", but in the case of a VF on a virtual bus, we have to start from the corresponding PF. Returns NULL if there is no upstream PCI bridge, i.e., if the device is on a root bus. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NYinghai Lu <yinghai@kernel.org>
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- 26 9月, 2013 3 次提交
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由 Bjorn Helgaas 提交于
Some code assumes "bus->self == NULL" means the bus is a root bus. This adds a comment explaining why this is incorrect ("virtual" buses added for SR-IOV have "bus->self == NULL" but are not root buses). No functional change. Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Yijing Wang 提交于
No one uses "is_pcie" now; remove this obsolete member. Signed-off-by: NYijing Wang <wangyijing@huawei.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Joe Perches 提交于
Use normal kernel-doc "Returns:" instead of "retrun" Assignment to bool is always 1 or 0 so the !! isn't necessary. Signed-off-by: NJoe Perches <joe@perches.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 23 8月, 2013 2 次提交
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由 Sebastian Ott 提交于
Platforms may want to provide architecture-specific functionality when a PCI device is doing a hibernate transition. Add a weak symbol pcibios_pm_ops that architectures can override to do so. [bhelgaas: fold in return value checks from v2 patch] Signed-off-by: NSebastian Ott <sebott@linux.vnet.ibm.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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由 Bjorn Helgaas 提交于
Based on a patch by Jon Mason (see URL below). All users of pcie_bus_configure_settings() pass arguments of the form "bus, bus->self->pcie_mpss". The "mpss" argument is redundant since we can easily look it up internally. In addition, all callers check "bus->self" for NULL, which we can also do internally. This patch simplifies the interface and the callers. No functional change. Reference: http://lkml.kernel.org/r/1317048850-30728-2-git-send-email-mason@myri.comSigned-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 16 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Users of pci_reset_bus() and pci_reset_slot() need a way to probe whether the bus or slot supports reset. Add trivial helper functions and export them as vfio-pci will make use of these. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 15 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Sometimes pci_reset_function() is not sufficient. We have cases where devices do not support any kind of reset, but there might be multiple functions on the bus preventing pci_reset_function() from doing a secondary bus reset. We also have cases where a device will advertise that it supports a PM reset, but really does nothing on D3hot->D0 (graphics cards are notorious for this). These devices often also have more than one function, so even blacklisting PM reset for them wouldn't allow a secondary bus reset through pci_reset_function(). If a driver supports multiple devices it should have the ability to induce a bus reset when it needs to. This patch provides that ability through pci_reset_slot() and pci_reset_bus(). It's the caller's responsibility when using these interfaces to understand that all of the devices in or below the slot (or on or below the bus) will be reset and therefore should be under control of the caller. PCI state of all the affected devices is saved and restored around these resets, but internal state of all of the affected devices is reset (which should be the intention). Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 13 8月, 2013 1 次提交
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由 Casey Leedom 提交于
New routine to avoid duplication of code to wait for pending PCI transactions to complete. Signed-off-by: NCasey Leedom <leedom@chelsio.com> Signed-off-by: NVipul Pandya <vipul@chelsio.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 12 8月, 2013 1 次提交
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由 Thierry Reding 提交于
The new struct msi_chip is used to associated an MSI controller with a PCI bus. It is automatically handed down from the root to its children during bus enumeration. This patch provides default (weak) implementations for the architecture- specific MSI functions (arch_setup_msi_irq(), arch_teardown_msi_irq() and arch_msi_check_device()) which check if a PCI device's bus has an attached MSI chip and forward the call appropriately. Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de> Signed-off-by: NThomas Petazzoni <thomas.petazzoni@free-electrons.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Tested-by: NDaniel Price <daniel.price@gmail.com> Tested-by: NThierry Reding <thierry.reding@gmail.com> Signed-off-by: NJason Cooper <jason@lakedaemon.net>
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- 10 8月, 2013 1 次提交
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由 Alex Williamson 提交于
Move the secondary bus reset code from pci_parent_bus_reset() into its own function. Export it as we'll later be calling it from hotplug controllers and elsewhere. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>
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- 31 7月, 2013 1 次提交
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由 Jacob Keller 提交于
A PCI Express device can potentially report a link width and speed which it will not properly fulfill due to being plugged into a slower link higher in the chain. This function walks up the PCI bus chain and calculates the minimum link width and speed of this entire chain. This can be useful to enable a device to determine if it has enough bandwidth for optimum functionality. Signed-off-by: NJacob Keller <jacob.e.keller@intel.com> Tested-by: NPhil Schmitt <phillip.j.schmitt@intel.com> Acked-by: NBjorn Helgaas <bhelgaas@google.com> Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>
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