1. 23 6月, 2009 1 次提交
    • R
      [ARM] idle: clean up pm_idle calling, obey hlt_counter · 9ccdac36
      Russell King 提交于
      pm_idle is used by infrastructure (eg, cpuidle) which expects architectures
      to call it in a certain way.  Arrange for ARM to follow x86's lead on this
      and call pm_idle() with interrupts already disabled.  However, we expect
      pm_idle() to enable interrupts before it returns.
      
      Also, OMAP wants to be able to disable hlt-ing, so allow hlt_counter to
      prevent all calls to pm_idle.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      9ccdac36
  2. 19 6月, 2009 1 次提交
  3. 30 5月, 2009 1 次提交
    • C
      Add core support for ARMv6/v7 big-endian · 26584853
      Catalin Marinas 提交于
      Starting with ARMv6, the CPUs support the BE-8 variant of big-endian
      (byte-invariant). This patch adds the core support:
      
      - setting of the BE-8 mode via the CPSR.E register for both kernel and
        user threads
      - big-endian page table walking
      - REV used to rotate instructions read from memory during fault
        processing as they are still little-endian format
      - Kconfig and Makefile support for BE-8. The --be8 option must be passed
        to the final linking stage to convert the instructions to
        little-endian
      Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
      26584853
  4. 03 4月, 2009 1 次提交
  5. 20 3月, 2009 1 次提交
    • R
      [ARM] pass reboot command line to arch_reset() · be093beb
      Russell King 提交于
      OMAP wishes to pass state to the boot loader upon reboot in order to
      instruct it whether to wait for USB-based reflashing or not.  There is
      already a facility to do this via the reboot() syscall, except we ignore
      the string passed to machine_restart().
      
      This patch fixes things to pass this string to arch_reset().  This means
      that we keep the reboot mode limited to telling the kernel _how_ to
      perform the reboot which should be independent of what we request the
      boot loader to do.
      Acked-by: NTony Lindgren <tony@atomide.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      be093beb
  6. 12 2月, 2009 1 次提交
  7. 06 9月, 2008 2 次提交
  8. 05 9月, 2008 1 次提交
    • R
      [ARM] sparse: fix several warnings · 09d9bae0
      Russell King 提交于
      arch/arm/kernel/process.c:270:6: warning: symbol 'show_fpregs' was not declared. Should it be static?
      
      This function isn't used, so can be removed.
      
      arch/arm/kernel/setup.c:532:9: warning: symbol 'len' shadows an earlier one
      arch/arm/kernel/setup.c:524:6: originally declared here
      
      A function containing two 'len's.
      
      arch/arm/mm/fault-armv.c:188:13: warning: symbol 'check_writebuffer_bugs' was not declared. Should it be static?
      arch/arm/mm/mmap.c:122:5: warning: symbol 'valid_phys_addr_range' was not declared. Should it be static?
      arch/arm/mm/mmap.c:137:5: warning: symbol 'valid_mmap_phys_addr_range' was not declared. Should it be static?
      
      Missing includes.
      
      arch/arm/kernel/traps.c:71:77: warning: Using plain integer as NULL pointer
      arch/arm/mm/ioremap.c:355:46: error: incompatible types in comparison expression (different address spaces)
      
      Sillies.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      09d9bae0
  9. 07 8月, 2008 1 次提交
  10. 19 7月, 2008 1 次提交
    • T
      nohz: prevent tick stop outside of the idle loop · b8f8c3cf
      Thomas Gleixner 提交于
      Jack Ren and Eric Miao tracked down the following long standing
      problem in the NOHZ code:
      
      	scheduler switch to idle task
      	enable interrupts
      
      Window starts here
      
      	----> interrupt happens (does not set NEED_RESCHED)
      	      	irq_exit() stops the tick
      
      	----> interrupt happens (does set NEED_RESCHED)
      
      	return from schedule()
      	
      	cpu_idle(): preempt_disable();
      
      Window ends here
      
      The interrupts can happen at any point inside the race window. The
      first interrupt stops the tick, the second one causes the scheduler to
      rerun and switch away from idle again and we end up with the tick
      disabled.
      
      The fact that it needs two interrupts where the first one does not set
      NEED_RESCHED and the second one does made the bug obscure and extremly
      hard to reproduce and analyse. Kudos to Jack and Eric.
      
      Solution: Limit the NOHZ functionality to the idle loop to make sure
      that we can not run into such a situation ever again.
      
      cpu_idle()
      {
      	preempt_disable();
      
      	while(1) {
      		 tick_nohz_stop_sched_tick(1); <- tell NOHZ code that we
      		 			          are in the idle loop
      
      		 while (!need_resched())
      		       halt();
      
      		 tick_nohz_restart_sched_tick(); <- disables NOHZ mode
      		 preempt_enable_no_resched();
      		 schedule();
      		 preempt_disable();
      	}
      }
      
      In hindsight we should have done this forever, but ... 
      
      /me grabs a large brown paperbag.
      
      Debugged-by: Jack Ren <jack.ren@marvell.com>, 
      Debugged-by: Neric miao <eric.y.miao@gmail.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      b8f8c3cf
  11. 13 5月, 2008 1 次提交
  12. 09 2月, 2008 2 次提交
  13. 20 10月, 2007 1 次提交
  14. 12 7月, 2007 1 次提交
  15. 18 6月, 2007 1 次提交
    • R
      [ARM] Update show_regs/oops register format · 154c772e
      Russell King 提交于
      Add the kernel release and version information to the output of
      show_regs/oops.  Add the CPU PSR register.  Avoid using printk
      to output partial lines; always output a complete line.
      
      Re-combine the "Control" and "Table + DAC" lines after nommu
      separated them; we don't want to waste vertical screen space
      needlessly.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      154c772e
  16. 22 4月, 2007 2 次提交
  17. 07 2月, 2007 1 次提交
    • R
      [ARM] Move processor_modes[] to .../process.c · ae0a846e
      Russell King 提交于
      bad_mode() currently prints the mode which caused the exception, and
      then causes an oops dump to be printed which again displays this
      information (since the CPSR in the struct pt_regs is correct.)  This
      leads to processor_modes[] being shared between traps.c and process.c
      with a local declaration of it.
      
      We can clean this up by moving processor_modes[] to process.c and
      removing the duplication, resulting in processor_modes[] becoming
      static.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      ae0a846e
  18. 30 11月, 2006 1 次提交
    • P
      [ARM] 3911/2: Simplify alloc_thread_info on ARM · 12221442
      Paul Gortmaker 提交于
      Remove ARM local cache of 4 struct thread_info.
      Can cause oops under certain circumstances.
      
      Russell indicated the original optimization was
      required on older kernels to avoid thread starvation
      on memory fragmentation, but may no longer be
      required.  I've updated the patch to 19rc4 and
      ensured no <config.h> dain-bramage slipped in this
      time (sorry about that).
      
      Original description follows:
      
      I was given some test results which pointed to an
      Oops in alloc_thread_info (happened 2x), and after
      looking at the code, I see that ARM has its own
      local cache of 4 struct thread_info. There wasn't
      any clear (to me) synchronization between the
      alloc_thread_info and the free_thread_info.
      
      I looked over the other arch, and they all simply
      allocate them on an as needed basis, so I simplified
      the ARM to do the same, based on the other arch
      (e.g. PPC) and the folks doing the testing have
      indicated that this fixed the oops.
      Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      12221442
  19. 28 9月, 2006 1 次提交
    • H
      [ARM] nommu: manage the CP15 things · f12d0d7c
      Hyok S. Choi 提交于
      All the current CP15 access codes in ARM arch can be categorized and
      conditioned by the defines as follows:
      
           Related operation	Safe condition
        a. any CP15 access	!CPU_CP15
        b. alignment trap	CPU_CP15_MMU
        c. D-cache(C-bit)	CPU_CP15
        d. I-cache		CPU_CP15 && !( CPU_ARM610 || CPU_ARM710 ||
      				CPU_ARM720 || CPU_ARM740 ||
      				CPU_XSCALE || CPU_XSC3 )
        e. alternate vector	CPU_CP15 && !CPU_ARM740
        f. TTB		CPU_CP15_MMU
        g. Domain		CPU_CP15_MMU
        h. FSR/FAR		CPU_CP15_MMU
      
      For example, alternate vector is supported if and only if
      "CPU_CP15 && !CPU_ARM740" is satisfied.
      Signed-off-by: NHyok S. Choi <hyok.choi@samsung.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f12d0d7c
  20. 02 7月, 2006 1 次提交
  21. 01 7月, 2006 1 次提交
  22. 22 6月, 2006 1 次提交
    • R
      [ARM] Add thread_notify infrastructure · d6551e88
      Russell King 提交于
      Some machine classes need to allow VFP support to be built into the
      kernel, but still allow the kernel to run even though VFP isn't
      present.  Unfortunately, the kernel hard-codes VFP instructions
      into the thread switch, which prevents this being run-time selectable.
      
      Solve this by introducing a notifier which things such as VFP can
      hook into to be informed of events which affect the VFP subsystem
      (eg, creation and destruction of threads, switches between threads.)
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      d6551e88
  23. 20 6月, 2006 1 次提交
  24. 16 5月, 2006 1 次提交
  25. 10 5月, 2006 1 次提交
  26. 01 4月, 2006 1 次提交
  27. 16 3月, 2006 1 次提交
  28. 13 1月, 2006 4 次提交
  29. 04 1月, 2006 1 次提交
    • R
      [ARM] Cleanup ARM includes · 78ff18a4
      Russell King 提交于
      arch/arm/kernel/entry-armv.S has contained a comment suggesting
      that asm/hardware.h and asm/arch/irqs.h should be moved into the
      asm/arch/entry-macro.S include.  So move the includes to these
      two files as required.
      
      Add missing includes (asm/hardware.h, asm/io.h) to asm/arch/system.h
      includes which use those facilities, and remove asm/io.h from
      kernel/process.c.
      
      Remove other unnecessary includes from arch/arm/kernel, arch/arm/mm
      and arch/arm/mach-footbridge.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      78ff18a4
  30. 09 11月, 2005 3 次提交
    • N
      [PATCH] sched: resched and cpu_idle rework · 64c7c8f8
      Nick Piggin 提交于
      Make some changes to the NEED_RESCHED and POLLING_NRFLAG to reduce
      confusion, and make their semantics rigid.  Improves efficiency of
      resched_task and some cpu_idle routines.
      
      * In resched_task:
      - TIF_NEED_RESCHED is only cleared with the task's runqueue lock held,
        and as we hold it during resched_task, then there is no need for an
        atomic test and set there. The only other time this should be set is
        when the task's quantum expires, in the timer interrupt - this is
        protected against because the rq lock is irq-safe.
      
      - If TIF_NEED_RESCHED is set, then we don't need to do anything. It
        won't get unset until the task get's schedule()d off.
      
      - If we are running on the same CPU as the task we resched, then set
        TIF_NEED_RESCHED and no further action is required.
      
      - If we are running on another CPU, and TIF_POLLING_NRFLAG is *not* set
        after TIF_NEED_RESCHED has been set, then we need to send an IPI.
      
      Using these rules, we are able to remove the test and set operation in
      resched_task, and make clear the previously vague semantics of
      POLLING_NRFLAG.
      
      * In idle routines:
      - Enter cpu_idle with preempt disabled. When the need_resched() condition
        becomes true, explicitly call schedule(). This makes things a bit clearer
        (IMO), but haven't updated all architectures yet.
      
      - Many do a test and clear of TIF_NEED_RESCHED for some reason. According
        to the resched_task rules, this isn't needed (and actually breaks the
        assumption that TIF_NEED_RESCHED is only cleared with the runqueue lock
        held). So remove that. Generally one less locked memory op when switching
        to the idle thread.
      
      - Many idle routines clear TIF_POLLING_NRFLAG, and only set it in the inner
        most polling idle loops. The above resched_task semantics allow it to be
        set until before the last time need_resched() is checked before going into
        a halt requiring interrupt wakeup.
      
        Many idle routines simply never enter such a halt, and so POLLING_NRFLAG
        can be always left set, completely eliminating resched IPIs when rescheduling
        the idle task.
      
        POLLING_NRFLAG width can be increased, to reduce the chance of resched IPIs.
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Cc: Ingo Molnar <mingo@elte.hu>
      Cc: Con Kolivas <kernel@kolivas.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      64c7c8f8
    • N
      [PATCH] sched: disable preempt in idle tasks · 5bfb5d69
      Nick Piggin 提交于
      Run idle threads with preempt disabled.
      
      Also corrected a bugs in arm26's cpu_idle (make it actually call schedule()).
      How did it ever work before?
      
      Might fix the CPU hotplugging hang which Nigel Cunningham noted.
      
      We think the bug hits if the idle thread is preempted after checking
      need_resched() and before going to sleep, then the CPU offlined.
      
      After calling stop_machine_run, the CPU eventually returns from preemption and
      into the idle thread and goes to sleep.  The CPU will continue executing
      previous idle and have no chance to call play_dead.
      
      By disabling preemption until we are ready to explicitly schedule, this bug is
      fixed and the idle threads generally become more robust.
      
      From: alexs <ashepard@u.washington.edu>
      
        PPC build fix
      
      From: Yoichi Yuasa <yuasa@hh.iij4u.or.jp>
      
        MIPS build fix
      Signed-off-by: NNick Piggin <npiggin@suse.de>
      Signed-off-by: NYoichi Yuasa <yuasa@hh.iij4u.or.jp>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      5bfb5d69
    • N
      [ARM] 3100/1: simplify a pointer computation · c906107b
      Nicolas Pitre 提交于
      Patch from Nicolas Pitre
      
      Looks clearer this way.
      Signed-off-by: NNicolas Pitre <nico@cam.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      c906107b
  31. 03 11月, 2005 1 次提交
  32. 27 7月, 2005 1 次提交