Rename win_commit() helper to update_plane() and win_disable() to
disable_plane().
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Get rid of legacy DRM vblank function that are less clear to use.
The new ones basically requires only the crtc as parameters.

It also clean ups exynos_drm_crtc_finish_pageflip() parameters as a
consequence.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Already drm_iommu_attach_device checks whether support iommu internally.
It should clear channels always regardless iommu support. We didn't know
because we can detect the problem when iommu is enabled, so we don't
have to use drm_iommu_attach_device_if_possible and then we can remove
drm_iommu_attach_device_if_possible and clear_channels function pointer.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Driver uses only VSYNC interrupts, so we need to cache VSYNC bit state only.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The driver uses bool protected by mutex to track power state.
The patch replaces this combo with single bit and atomic bitops.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Already drm_iommu_attach_device and drm_iommu_detach_device check
whether support iommu internally, so we don't have to call
is_drm_iommu_supported before call them.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

INT_EN cache field was updated only by mixer_enable_vblank.
The patch adds update also by mixer_disable_vblank function.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Specification advises to clear vsync indicator before configuring vsync.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The driver used incorrect flags to clear interrupt status.
The patch fixes it.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Every CRTC drivers in Exynos DRM implements the code which checks
whether IOMMU is supported or not, and if supported enable it.
Making new helper for it generalize each CRTC drivers.
Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

With atomic modesetting all the control for CRTC, Planes, Encoders and
Connectors should come from DRM core, so the driver is not allowed to
enable or disable planes from inside the crtc_enable()/disable() call.

But it needs to disable planes with crtc_disable in exynos driver
internally. Because crtc is disabled before plane is disabled, it means
plane_disable just returns without any register changes, then we cannot
be sure setting register to disable plane when crtc is disable.

This patch removes this chainned calls to enable plane from exynos hw
drivers code letting only DRM core touch planes except to disable plane.
Also it leads eliminable enabled and resume of struct exynos_drm_plane.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The reason waiting vblank is to be power gated and disabled clocks after
dma operation is completed. The dma operation is stopped already before
be power gated and clocks are disabled when mixer is disabled by commit
381be025("drm/exynos: stop mixer before gating clocks during
poweroff"). Don't need to wait vblank anymore.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

In case there are multiple pipelines and deferred probe occurs, only components
of the first pipeline were bound. As a result only one pipeline was available.
The main cause of this issue was dynamic generation of component match table -
every component driver during probe registered itself on helper list, if there
was at least one pipeline present on this list component match table were
created without deferred components.
This patch removes this helper list, instead it creates match table from
existing devices requiring exynos_drm KMS drivers. This way match table do not
depend on probe/deferral order and contains all KMS components.
As a side effect patch makes the code cleaner and significantly smaller.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Check error and call DRM_ERROR if clk_prepare_enable() fails.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

To follow more closely the new atomic API we split the dpms()
helper into the enable() and disable() helper to get exactly the
same semantics.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The index for the hardware layer is always >=0. Previous
code that also used -1 as special index is now gone.

Also apply this to 'ch_enabled' (decon/fimd), since the
variable is on the same line (and is again always unsigned).
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

mixer_regs_dump() was called in mixer_run(), which was called
under the register spinlock in mixer_graph_buffer() and
vp_video_buffer().

This would trigger a sysmmu pagefault with drm.debug=0xff because
of the large delay caused by the register dumping.

To keep consistency also move register dumping out of mixer_stop(),
which is the counterpart to mixer_run().

Kernel dump:
[  131.296529] [drm:mixer_win_commit] win: 2
[  131.300693] [drm:mixer_regs_dump] MXR_STATUS = 00000081
[  131.305888] [drm:mixer_regs_dump] MXR_CFG = 000007d5
[  131.310835] [drm:mixer_regs_dump] MXR_INT_EN = 00000000
[  131.316043] [drm:mixer_regs_dump] MXR_INT_STATUS = 00000900
[  131.321598] [drm:mixer_regs_dump] MXR_LAYER_CFG = 00000321
[  131.327066] [drm:mixer_regs_dump] MXR_VIDEO_CFG = 00000000
[  131.332535] [drm:mixer_regs_dump] MXR_GRAPHIC0_CFG = 00310700
[  131.338263] [drm:mixer_regs_dump] MXR_GRAPHIC0_BASE = 20c00000
[  131.344079] [drm:mixer_regs_dump] MXR_GRAPHIC0_SPAN = 00000780
[  131.349895] [drm:mixer_regs_dump] MXR_GRAPHIC0_WH = 07800438
[  131.355537] [drm:mixer_regs_dump] MXR_GRAPHIC0_SXY = 00000000
[  131.361265] [drm:mixer_regs_dump] MXR_GRAPHIC0_DXY = 00000000
[  131.366994] [drm:mixer_regs_dump] MXR_GRAPHIC1_CFG = 00000000
[  131.372723] [drm:mixer_regs_dump] MXR_GRAPHIC1_BASE = 00000000
[  131.378539] [drm:mixer_regs_dump] MXR_GRAPHIC1_SPAN = 00000000
[  131.384354] [drm:mixer_regs_dump] MXR_GRAPHIC1_WH = 00000000
[  131.389996] [drm:mixer_regs_dump] MXR_GRAPHIC1_SXY = 00000000
[  131.395725] [drm:mixer_regs_dump] MXR_GRAPHIC1_DXY = 00000000
[  131.401486] PAGE FAULT occurred at 0x0 by 12e20000.sysmmu(Page table base: 0x6d990000)
[  131.409353]  Lv1 entry: 0x6e0f2401
[  131.412753] ------------[ cut here ]------------
[  131.417339] kernel BUG at drivers/iommu/exynos-iommu.c:358!
[  131.422894] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM
[  131.428709] Modules linked in: ecb bridge stp llc bnep btrfs xor xor_neon zlib_inflate zlib_deflate raid6_pq btusb bluetooth usb_storage s5p_jpeg
videobuf2_dma_contig videobuf2_memops v4l2_mem2mem videobuf2_core
[  131.447461] CPU: 0 PID: 2418 Comm: lt-modetest Tainted: G        W       4.0.1-debug+ #3
[  131.455530] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  131.461607] task: ee194100 ti: ec4fe000 task.ti: ec4fe000
[  131.466995] PC is at exynos_sysmmu_irq+0x2a0/0x2a8
[  131.471766] LR is at vprintk_emit+0x268/0x594
[  131.476103] pc : [<c02781a4>]    lr : [<c00650d0>]    psr: a00001d3
[  131.476103] sp : ec4ff9d8  ip : 00000000  fp : ec4ffa14
[  131.487559] r10: ffffffda  r9 : ee206e28  r8 : ee2d1a10
[  131.492767] r7 : 00000000  r6 : 00000000  r5 : 00000000  r4 : ee206e10
[  131.499277] r3 : c06fca20  r2 : 00000000  r1 : 00000000  r0 : ee28be00
[  131.505788] Flags: NzCv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment user
[  131.513079] Control: 10c5387d  Table: 6c72404a  DAC: 00000015
[  131.518808] Process lt-modetest (pid: 2418, stack limit = 0xec4fe218)
[  131.525231] Stack: (0xec4ff9d8 to 0xec500000)
[  131.529571] f9c0:                                                       ec4ff9e4 c03a0c40
[  131.537732] f9e0: bbfa6e35 6d990000 6d161c3d ee20a900 ee04a7e0 00000028 ee007000 00000000
[  131.545891] fa00: 00000000 c06fb1fc ec4ffa5c ec4ffa18 c0066a34 c0277f10 ee257664 0000000b
[  131.554050] fa20: ec4ffa5c c06fafbb ee04a780 c06fb1e8 00000000 ee04a780 ee04a7e0 ee20a900
[  131.562209] fa40: ee007000 00000015 ec4ffb48 ee008000 ec4ffa7c ec4ffa60 c0066c90 c00669e0
[  131.570369] fa60: 00020000 ee04a780 ee04a7e0 00001000 ec4ffa94 ec4ffa80 c0069c6c c0066c58
[  131.578528] fa80: 00000028 ee004450 ec4ffaac ec4ffa98 c0066028 c0069bac 000000a0 c06e19b4
[  131.586687] faa0: ec4ffad4 ec4ffab0 c0223678 c0066000 c02235dc 00000015 00000000 00000015
[  131.594846] fac0: ec4ffc80 00000001 ec4ffaec ec4ffad8 c0066028 c02235e8 00000089 c06bfc54
[  131.603005] fae0: ec4ffb1c ec4ffaf0 c006633c c0066000 ec4ffb48 f002000c 00000025 00000015
[  131.611165] fb00: c06c680c ec4ffb48 f0020000 ee008000 ec4ffb44 ec4ffb20 c000867c c00662c4
[  131.619324] fb20: c02046ac 60000153 ffffffff ec4ffb7c 00000000 00000101 ec4ffbb4 ec4ffb48
[  131.627483] fb40: c0013240 c0008650 00000001 ee257508 00000002 00000001 ee257504 ee257508
[  131.635642] fb60: 00000000 c06bf27c 00000000 00000101 ee008000 ec4ffbb4 00000000 ec4ffb90
[  131.643802] fb80: c002e124 c02046ac 60000153 ffffffff c002e09c 00000000 c06c6080 00000283
[  131.651960] fba0: 00000001 c06fb1ac ec4ffc0c ec4ffbb8 c002d690 c002e0a8 ee78d080 ee008000
[  131.660120] fbc0: 00400000 c04eb3b0 ffff7c44 c06c6100 c06fdac0 0000000a c06bf2f0 c06c6080
[  131.668279] fbe0: c06bfc54 c06bfc54 00000000 00000025 00000000 00000001 ec4ffc80 ee008000
[  131.676438] fc00: ec4ffc24 ec4ffc10 c002dbb8 c002d564 00000089 c06bfc54 ec4ffc54 ec4ffc28
[  131.684597] fc20: c0066340 c002dafc ec4ffc80 f002000c 0000001c 0000000c c06c680c ec4ffc80
[  131.692757] fc40: f0020000 00000080 ec4ffc7c ec4ffc58 c000867c c00662c4 c04e6624 60000053
[  131.700916] fc60: ffffffff ec4ffcb4 c072df54 ee22d010 ec4ffcdc ec4ffc80 c0013240 c0008650
[  131.709075] fc80: ee22d664 ee194100 00000000 ec4fe000 60000053 00000400 00000002 ee22d420
[  131.717234] fca0: c072df54 ee22d010 00000080 ec4ffcdc ec4ffcc8 ec4ffcc8 c04e6620 c04e6624
[  131.725393] fcc0: 60000053 ffffffff ec4fe000 c072df54 ec4ffd34 ec4ffce0 c02b64d0 c04e6618
[  131.733552] fce0: ec4ffcf8 00000000 00000000 60000053 00010000 00010000 00000000 200cb000
[  131.741712] fd00: 20080000 ee22d664 00000001 ee256000 ee261400 ee22d420 00000080 00000080
[  131.749871] fd20: ee256000 00000280 ec4ffd74 ec4ffd38 c02a8844 c02b5fec 00000080 00000280
[  131.758030] fd40: 000001e0 00000000 00000000 00000280 000001e0 ee22d220 01e00000 00000002
[  131.766189] fd60: ee22d420 ee261400 ec4ffdbc ec4ffd78 c0293cbc c02a87a4 00000080 00000280
[  131.774348] fd80: 000001e0 00000000 00000000 02800000 01e00000 ee261400 ee22d460 ee261400
[  131.782508] fda0: ee22d420 00000000 01e00000 000001e0 ec4ffe24 ec4ffdc0 c0297800 c0293b24
[  131.790667] fdc0: 00000080 00000280 000001e0 00000000 00000000 02800000 01e00000 ec4ffdf8
[  131.798826] fde0: c028db00 00000080 00000080 ee256000 02800000 00000000 ec4ffe24 c06c6448
[  131.806985] fe00: c072df54 000000b7 ee013800 ec4ffe54 edbf7300 ec4ffe54 ec4fff04 ec4ffe28
[  131.815145] fe20: c028a848 c029768c 00000001 c06195d8 ec4ffe5c ec4ffe40 c0297680 c0521f6c
[  131.823304] fe40: 00000030 bed45d38 00000030 c03064b7 ec4ffe8c 00000011 00000015 00000022
[  131.831463] fe60: 00000000 00000080 00000080 00000280 000001e0 00000000 00000000 01e00000
[  131.839622] fe80: 02800000 00000000 00000000 0004b000 00000000 00000000 c00121e4 c0011080
[  131.847781] fea0: c00110a4 00000000 00000000 00000000 ec4ffeec ec4ffec0 c00110f0 c00121cc
[  131.855940] fec0: 00000000 c00e7fec ec4ffeec ec4ffed8 c004af2c dc8ba201 edae4fc0 edbf7000
[  131.864100] fee0: edbf7000 00000003 bed45d38 00000003 bed45d38 ee3f2040 ec4fff7c ec4fff08
[  131.872259] ff00: c010b62c c028a684 edae4fc0 00000000 00000000 b6666000 ec40d108 edae4fc4
[  131.880418] ff20: ec4fff6c ec4fff30 c00e7fec c02207b0 000001f9 00000000 edae5008 ec40d110
[  131.888577] ff40: 00070800 edae5008 edae4fc0 00070800 b6666000 edbf7000 edbf7000 c03064b7
[  131.896736] ff60: bed45d38 00000003 ec4fe000 00000000 ec4fffa4 ec4fff80 c010b84c c010b208
[  131.904896] ff80: 00000022 00000000 bed45d38 c03064b7 00000036 c000ede4 00000000 ec4fffa8
[  131.913055] ffa0: c000ec40 c010b81c 00000000 bed45d38 00000003 c03064b7 bed45d38 00000022
[  131.921214] ffc0: 00000000 bed45d38 c03064b7 00000036 00000080 00000080 00000000 000001e0
[  131.929373] ffe0: b6da4064 bed45d1c b6d98968 b6e8082c 60000050 00000003 00000000 00000000
[  131.937529] Backtrace:
[  131.939967] [<c0277f04>] (exynos_sysmmu_irq) from [<c0066a34>] (handle_irq_event_percpu+0x60/0x278)
[  131.948988]  r10:c06fb1fc r9:00000000 r8:00000000 r7:ee007000 r6:00000028 r5:ee04a7e0
[  131.956799]  r4:ee20a900
[  131.959320] [<c00669d4>] (handle_irq_event_percpu) from [<c0066c90>] (handle_irq_event+0x44/0x64)
[  131.968170]  r10:ee008000 r9:ec4ffb48 r8:00000015 r7:ee007000 r6:ee20a900 r5:ee04a7e0
[  131.975982]  r4:ee04a780
[  131.978504] [<c0066c4c>] (handle_irq_event) from [<c0069c6c>] (handle_level_irq+0xcc/0x144)
[  131.986832]  r6:00001000 r5:ee04a7e0 r4:ee04a780 r3:00020000
[  131.992478] [<c0069ba0>] (handle_level_irq) from [<c0066028>] (generic_handle_irq+0x34/0x44)
[  132.000894]  r5:ee004450 r4:00000028
[  132.004459] [<c0065ff4>] (generic_handle_irq) from [<c0223678>] (combiner_handle_cascade_irq+0x9c/0x108)
[  132.013914]  r4:c06e19b4 r3:000000a0
[  132.017476] [<c02235dc>] (combiner_handle_cascade_irq) from [<c0066028>] (generic_handle_irq+0x34/0x44)
[  132.026847]  r8:00000001 r7:ec4ffc80 r6:00000015 r5:00000000 r4:00000015 r3:c02235dc
[  132.034576] [<c0065ff4>] (generic_handle_irq) from [<c006633c>] (__handle_domain_irq+0x84/0xf0)
[  132.043252]  r4:c06bfc54 r3:00000089
[  132.046815] [<c00662b8>] (__handle_domain_irq) from [<c000867c>] (gic_handle_irq+0x38/0x70)
[  132.055144]  r10:ee008000 r9:f0020000 r8:ec4ffb48 r7:c06c680c r6:00000015 r5:00000025
[  132.062956]  r4:f002000c r3:ec4ffb48
[  132.066520] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.073980] Exception stack(0xec4ffb48 to 0xec4ffb90)
[  132.079016] fb40:                   00000001 ee257508 00000002 00000001 ee257504 ee257508
[  132.087176] fb60: 00000000 c06bf27c 00000000 00000101 ee008000 ec4ffbb4 00000000 ec4ffb90
[  132.095333] fb80: c002e124 c02046ac 60000153 ffffffff
[  132.100367]  r9:00000101 r8:00000000 r7:ec4ffb7c r6:ffffffff r5:60000153 r4:c02046ac
[  132.108098] [<c002e09c>] (tasklet_hi_action) from [<c002d690>] (__do_softirq+0x138/0x38c)
[  132.116251]  r8:c06fb1ac r7:00000001 r6:00000283 r5:c06c6080 r4:00000000 r3:c002e09c
[  132.123980] [<c002d558>] (__do_softirq) from [<c002dbb8>] (irq_exit+0xc8/0x104)
[  132.131268]  r10:ee008000 r9:ec4ffc80 r8:00000001 r7:00000000 r6:00000025 r5:00000000
[  132.139080]  r4:c06bfc54
[  132.141600] [<c002daf0>] (irq_exit) from [<c0066340>] (__handle_domain_irq+0x88/0xf0)
[  132.149409]  r4:c06bfc54 r3:00000089
[  132.152971] [<c00662b8>] (__handle_domain_irq) from [<c000867c>] (gic_handle_irq+0x38/0x70)
[  132.161300]  r10:00000080 r9:f0020000 r8:ec4ffc80 r7:c06c680c r6:0000000c r5:0000001c
[  132.169112]  r4:f002000c r3:ec4ffc80
[  132.172675] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.180137] Exception stack(0xec4ffc80 to 0xec4ffcc8)
[  132.185173] fc80: ee22d664 ee194100 00000000 ec4fe000 60000053 00000400 00000002 ee22d420
[  132.193332] fca0: c072df54 ee22d010 00000080 ec4ffcdc ec4ffcc8 ec4ffcc8 c04e6620 c04e6624
[  132.201489] fcc0: 60000053 ffffffff
[  132.204961]  r9:ee22d010 r8:c072df54 r7:ec4ffcb4 r6:ffffffff r5:60000053 r4:c04e6624
[  132.212694] [<c04e660c>] (_raw_spin_unlock_irqrestore) from [<c02b64d0>] (mixer_win_commit+0x4f0/0xcc8)
[  132.222060]  r4:c072df54 r3:ec4fe000
[  132.225625] [<c02b5fe0>] (mixer_win_commit) from [<c02a8844>] (exynos_update_plane+0xac/0xb8)
[  132.234126]  r10:00000280 r9:ee256000 r8:00000080 r7:00000080 r6:ee22d420 r5:ee261400
[  132.241937]  r4:ee256000
[  132.244461] [<c02a8798>] (exynos_update_plane) from [<c0293cbc>] (__setplane_internal+0x1a4/0x2c0)
[  132.253395]  r7:ee261400 r6:ee22d420 r5:00000002 r4:01e00000
[  132.259041] [<c0293b18>] (__setplane_internal) from [<c0297800>] (drm_mode_setplane+0x180/0x244)
[  132.267804]  r9:000001e0 r8:01e00000 r7:00000000 r6:ee22d420 r5:ee261400 r4:ee22d460
[  132.275535] [<c0297680>] (drm_mode_setplane) from [<c028a848>] (drm_ioctl+0x1d0/0x58c)
[  132.283428]  r10:ec4ffe54 r9:edbf7300 r8:ec4ffe54 r7:ee013800 r6:000000b7 r5:c072df54
[  132.291240]  r4:c06c6448
[  132.293763] [<c028a678>] (drm_ioctl) from [<c010b62c>] (do_vfs_ioctl+0x430/0x614)
[  132.301222]  r10:ee3f2040 r9:bed45d38 r8:00000003 r7:bed45d38 r6:00000003 r5:edbf7000
[  132.309034]  r4:edbf7000
[  132.311555] [<c010b1fc>] (do_vfs_ioctl) from [<c010b84c>] (SyS_ioctl+0x3c/0x64)
[  132.318842]  r10:00000000 r9:ec4fe000 r8:00000003 r7:bed45d38 r6:c03064b7 r5:edbf7000
[  132.326654]  r4:edbf7000
[  132.329176] [<c010b810>] (SyS_ioctl) from [<c000ec40>] (ret_fast_syscall+0x0/0x34)
[  132.336723]  r8:c000ede4 r7:00000036 r6:c03064b7 r5:bed45d38 r4:00000000 r3:00000022
[  132.344451] Code: e3130002 0affffaf eb09a67d eaffffad (e7f001f2)
[  132.350528] ---[ end trace d428689b94df895c ]---
[  132.355126] Kernel panic - not syncing: Fatal exception in interrupt
[  132.361465] CPU2: stopping
[  132.364155] CPU: 2 PID: 0 Comm: swapper/2 Tainted: G      D W       4.0.1-debug+ #3
[  132.371791] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.377866] Backtrace:
[  132.380304] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.387849]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.393497] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.400698] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.408073]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0b0000
[  132.413718] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.421267]  r9:f0028000 r8:ee0b1f48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002800c
[  132.428995] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.436457] Exception stack(0xee0b1f48 to 0xee0b1f90)
[  132.441493] 1f40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.449653] 1f60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0b1f9c ee0b1fa0 ee0b1f90
[  132.457811] 1f80: c000f82c c000f830 600f0053 ffffffff
[  132.462844]  r9:00000001 r8:c06c0dc0 r7:ee0b1f7c r6:ffffffff r5:600f0053 r4:c000f830
[  132.470575] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.478818] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.487755]  r7:c06fd440
[  132.490279] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.497651]  r4:6e09006a r3:c000872c
[  132.501210] CPU3: stopping
[  132.503904] CPU: 3 PID: 0 Comm: swapper/3 Tainted: G      D W       4.0.1-debug+ #3
[  132.511539] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.517614] Backtrace:
[  132.520051] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.527597]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.533243] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.540446] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.547820]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0b2000
[  132.553466] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.561014]  r9:f002c000 r8:ee0b3f48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002c00c
[  132.568743] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.576205] Exception stack(0xee0b3f48 to 0xee0b3f90)
[  132.581241] 3f40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.589401] 3f60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0b3f9c ee0b3fa0 ee0b3f90
[  132.597558] 3f80: c000f82c c000f830 600f0053 ffffffff
[  132.602591]  r9:00000001 r8:c06c0dc0 r7:ee0b3f7c r6:ffffffff r5:600f0053 r4:c000f830
[  132.610321] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.618566] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.627503]  r7:c06fd440
[  132.630023] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.637399]  r4:6e09006a r3:c000872c
[  132.640958] CPU1: stopping
[  132.643651] CPU: 1 PID: 0 Comm: swapper/1 Tainted: G      D W       4.0.1-debug+ #3
[  132.651287] Hardware name: SAMSUNG EXYNOS (Flattened Device Tree)
[  132.657362] Backtrace:
[  132.659799] [<c0012484>] (dump_backtrace) from [<c001269c>] (show_stack+0x18/0x1c)
[  132.667344]  r6:c06e158c r5:ffffffff r4:00000000 r3:dc8ba201
[  132.672991] [<c0012684>] (show_stack) from [<c04dfb94>] (dump_stack+0x88/0xc8)
[  132.680194] [<c04dfb0c>] (dump_stack) from [<c0014894>] (handle_IPI+0x1c8/0x2c4)
[  132.687569]  r6:c06bfc54 r5:c06bfc54 r4:00000005 r3:ee0ae000
[  132.693214] [<c00146cc>] (handle_IPI) from [<c00086b0>] (gic_handle_irq+0x6c/0x70)
[  132.700762]  r9:f0024000 r8:ee0aff48 r7:c06c680c r6:fffffff5 r5:00000005 r4:f002400c
[  132.708491] [<c0008644>] (gic_handle_irq) from [<c0013240>] (__irq_svc+0x40/0x74)
[  132.715953] Exception stack(0xee0aff48 to 0xee0aff90)
[  132.720989] ff40:                   00000001 00000000 00000000 c00206c0 c06c6518 c04eb3a4
[  132.729149] ff60: 00000000 00000000 c06c0dc0 00000001 c06fb774 ee0aff9c ee0affa0 ee0aff90
[  132.737306] ff80: c000f82c c000f830 60070053 ffffffff
[  132.742339]  r9:00000001 r8:c06c0dc0 r7:ee0aff7c r6:ffffffff r5:60070053 r4:c000f830
[  132.750069] [<c000f7f0>] (arch_cpu_idle) from [<c005b6e8>] (cpu_startup_entry+0x318/0x4ec)
[  132.758314] [<c005b3d0>] (cpu_startup_entry) from [<c00144d0>] (secondary_start_kernel+0xf4/0x100)
[  132.767251]  r7:c06fd440
[  132.769772] [<c00143dc>] (secondary_start_kernel) from [<40008744>] (0x40008744)
[  132.777146]  r4:6e09006a r3:c000872c
[  132.780709] ---[ end Kernel panic - not syncing: Fatal exception in interrupt
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The Exynos DRM code does not modify the ops provided by CRTC driver in
exynos_drm_crtc_create() call.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The platform_device_id is not modified by the driver and core uses it as
const.
Signed-off-by: NKrzysztof Kozlowski <k.kozlowski.k@gmail.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Move the defines for the pixelformats that the mixer supports out
of mixer_graph_buffer() to the top of the source.
Then select the mixer pixelformat (pf) in mixer_graph_buffer() based on
the plane's pf (and not bpp).
Also add handling of RGB565 and XRGB1555 to the switch statement and
exit early if the plane has an unsupported pf.

Partially based on 'drm/exynos: enable/disable blend based on pixel
format' by Gustavo Padovan <gustavo.padovan@collabora.co.uk>.

v2: Use the shorter MXR_FORMAT as prefix.
v3: Re-add ARGB8888 because of compatibility reasons
    (suggested by Joonyoung Shim).
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

All the necessary code is already there, just need to
handle the format in the switch statement.
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The video processor (VP) supports four formats: NV12, NV21 and its
tiled variants. All these formats are bi-planar, so the buffer
count in vp_video_buffer() is always 2.

Also properly exit if we're called with an invalid (non-VP) pixelformat.
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Calculation ratio from exynos_drm plane codes, then each hw drivers can
use it without extra operation. Also this fixes width and height of
source used for actual crtc shown via screen.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

It's more reasonable to use src_x and src_y to represent source as
counterpart of destination(crtc). Already we are using src_width and
src_height for width and height of source.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

While the VP (video processor) supports arbitrary scaling
of its input, the mixer just supports a simple 2x (line
doubling) scaling. Expose this functionality and exit
early when an unsupported scaling configuration is
encountered.

This was tested with modetest's DRM plane test (from
the libdrm test suite) on an Odroid-X2 (Exynos4412).

v2: Put if- and return-statement on different lines.
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Use the correct spelling for 'progressive'.
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NTobias Jakobi <tjakobi@math.uni-bielefeld.de>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Usually userspace don't want to have two overlay planes on the same zpos
so this change assign a different zpos for each plane. Before this change
a zpos of value zero was created for all planes so the userspace had to
set up the zpos of every plane it wanted to use.

Also all places that were storing zpos positions are now unsigned int.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

struct {fimd,mixer,vidi}_win_data was just keeping the same data
as struct exynos_drm_plane thus get ride of it and use exynos_drm_plane
directly.

It changes how planes are created and remove .win_mode_set() callback
that was only filling all *_win_data structs.

v2: check for return of exynos_plane_init()
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

When performing a modeset, use the framebuffer pitch value to set FIMD
IMG_SIZE and Mixer SPAN registers. These are both defined as pitch - the
distance between contiguous lines (bytes for FIMD, pixels for mixer).

Fixes display on Snow (1366x768).
Signed-off-by: NDaniel Stone <daniels@collabora.com>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

For default graphic window, mixer_win_commit() sets display size
register as fb size. Calling setplane with smaller fb size than
mode size to default window causes distorted display result. So
this patch replaces fb size with mode size for display size from
the mixer_win_commit().
Signed-off-by: NSeung-Woo Kim <sw0312.kim@samsung.com>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

The hdmi outputs black screen only even though under the hood Xorg and
framebuffer console  are fine : devices found and initialized, but
not a pixel out.

Commit 93bca243 ("drm/exynos: remove struct exynos_drm_manager")
changed the call order of mixer_initialize with regards to
 exynos_drm_crtc_create.

This changes breaks hdmi out on Odroid U2 (linux-next with added
 Marek Szyprowski v4 hdmi patchset from linux-samsung-soc ML).

Restore the previous call ordering get hdmi to ouput proper pixels:
ie call mixer_initialize first then exynos_drm_crtc_create.

Fixes: 93bca243 ("drm/exynos: remove struct exynos_drm_manager")
Signed-off-by: NAlban Browaeys <prahal@yahoo.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Use driver internal struct as argument instead of struct exynos_drm_crtc
except functions of exynos_drm_crtc_ops and instead of struct
exynos_drm_display except functions of exynos_drm_display_ops.

It can reduce unnecessary variable declaration.
Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Mixed need to have hdmi clock enabled to properly perform power on/off
sequences, so add handling of this clock directly to the mixer driver.
Dependency between hdmi clock and mixer module has been observed on
Exynos4 based boards.
Suggested-by: NAndrzej Hajda <a.hajda@samsung.com>
Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

So this has been merged originally in

commit 83052d4d
Author: Seung-Woo Kim <sw0312.kim@samsung.com>
Date:   Thu Dec 15 15:40:55 2011 +0900

    drm: Add multi buffer plane pixel formats

which hasn't seen a lot of review really. The problem is that it's not
a real pixel format, but just a different way to lay out NV12 pixels
in macroblocks, i.e. a tiling format.

The new way of doing this is with the soon-to-be-merged fb modifiers.

This was brough up in some long irc discussion around the entire
topic, as an example of where things have gone wrong. Luckily we can
correct the mistake:
- The kms side support for NV12MT is all dead code because
  format_check in drm_crtc.c never accepted NV12MT.
- The gem side for the gsc support doesn't look better: The code
  forgets to set the pixel format and makes a big mess with the tiling
  mode bits, inadvertedly setting them all.

Conclusion: This never really worked (at least not in upstream) and
hence we can safely correct our mistake here.

Cc: Seung-Woo Kim <sw0312.kim@samsung.com>
Cc: Inki Dae <inki.dae@samsung.com>
Cc: Kyungmin Park <kyungmin.park@samsung.com>
Cc: Rob Clark <robclark@freedesktop.org>
Cc: Daniel Stone <daniel@fooishbar.org>
Cc: Damien Lespiau <damien.lespiau@intel.com>
Reviewed-by: NRob Clark <robclark@freedesktop.org>
Reviewed-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Acked-by: NJoonyoung Shim <jy0922.shim@samsung.com>
Acked-by: NSeung-Woo Kim <sw0312.kim@samsung.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com>

exynos_drm_manager was just a redundant struct to represent the crtc as
well. In this commit we merge exynos_drm_manager into exynos_drm_crtc to
remove an unnecessary level of indirection easing the understand of the
flow on exynos.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

manager-drm_dev is only accessed by exynos_drm_crtc_create() so this patch
pass drm_dev as argument on exynos_drm_crtc_create() and remove it from
struct exynos_drm_manager.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

'type' is now part of the struct exynos_drm_crtc. This is just another
step in the struct exynos_drm_manager removal.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

It is not longer used. This is part of the process of removing
struct exynos_drm_manager entirely.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

Get the pipe value from a parameter instead of getting it from
manager->pipe. We are removing manager->pipe.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>

struct exynos_drm_overlay has no practical advantage nor serves as
important piece of the exynos API design. The only place it was used
was inside the struct exynos_plane which was just causing a extra
access overhead. Users had to access the overlay first and just then
get the plane information it contains.

This patch merges struct exynos_drm_overlay into struct exynos_plane.
It also renames struct exynos_plane to struct exynos_drm_plane.

The rational is to cut one step to access plane information.
Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk>
Signed-off-by: NInki Dae <inki.dae@samsung.com>