- 11 8月, 2010 6 次提交
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由 Marek Szyprowski 提交于
This patch adds support for regulator API to sdhci core driver. Regulators can be used to disable power in suspended state to reduce dissipated energy. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Marek Szyprowski 提交于
S3C SDHCI host controller can change the source for generating mmc clock. By default host bus clock is used, what causes some problems on machines with 133MHz bus, because the SDHCI divider cannot be as high get proper clock value for identification mode. This is not a problem for the controller, because it can generate lower frequencies from other clock sources. This patch changes sdhci driver to use get_min_clock() call if it has been provided. This fixes the flood of the following warnings on Samsung S5PV210 SoCs: mmc0: Minimum clock frequency too high for identification mode Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kyungmin Park 提交于
Some host controllers can set mmc->caps before sdhci_add_host(). Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kyungmin Park 提交于
Some host controllers such as s5pc110 support the WIDE8 feature. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kyungmin Park 提交于
When using QUIRK_NONSTANDARD_CLOCK, it checks the set_clock() function which is not used actually. So delete it. Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Maxim Levitsky 提交于
The current way of disabling it is not well tested by vendor and has all kinds of bugs that show up on resume from ram/disk. A very good example is a dead SDHCI controller. Old way of disabling is still supported by continuing to use CONFIG_MMC_RICOH_MMC. Based on 'http://list.drzeus.cx/pipermail/sdhci-devel/2007-December/002085.html' Therefore most of the credit for this goes to Andrew de Quincey Signed-off-by: NMaxim Levitsky <maximlevitsky@gmail.com> Cc: Andrew de Quincey <adq_dvb@lidskialf.net> Acked-by: NPhilip Langdale <philipl@overt.org> Cc: "Rafael J. Wysocki" <rjw@sisk.pl> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 5月, 2010 3 次提交
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由 Matt Fleming 提交于
Even though many mmc host drivers pass a pm_message_t argument to mmc_suspend_host() that argument isn't used the by MMC core. As host drivers are converted to dev_pm_ops they'll have to construct pm_message_t's (as they won't be passed by the PM subsystem any more) just to appease the mmc suspend interface. We might as well just delete the unused paramter. Signed-off-by: NMatt Fleming <matt@console-pimps.org> Acked-by: NAnton Vorontsov <cbouatmailru@gmail.com> Acked-by: Michal Miroslaw <mirq-linux@rere.qmqm.pl>ZZ Acked-by: NSascha Sommer <saschasommer@freenet.de> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Thomas Abraham 提交于
The s3c6410 sdhci controller does not support the 'End' attribute and NOP attribute in the same 8-Byte ADMA descriptor. This patch adds a new quirk to identify sdhci host contollers with such behaviour. In addition to this, for controllers using the new quirk, the last entry in the ADMA descritor table is marked with the 'End' attribute (instead of using a NOP descriptor with 'End' attribute). Signed-off-by: NMaurus Cuelenaere <mcuelenaere@gmail.com> Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Acked-by: NBen Dooks <ben-linux@fluff.org> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
Some hosts (e.g. as found in CNS3xxx SOCs) report wrong value in CLOCK_BASE capability field, and currently there is no way to force the SDHCI core to use the platform-provided base clock value. This patch implements CAP_CLOCK_BASE_BROKEN quirk. When enabled, the SDHCI core will always use base clock frequency provided by the platform. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Richard Röjfors <richard.rojfors@pelagicore.com> Cc: David Vrabel <david.vrabel@csr.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Ben Dooks <ben@simtec.co.uk> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 07 3月, 2010 3 次提交
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由 Nicolas Pitre 提交于
Tested with an XO v1.5 from OLPC. Signed-off-by: NNicolas Pitre <nico@marvell.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Ben Dooks 提交于
sdhci_set_adma_desc() is using byte-writes to write data in a specified order into memory. Change to using __le16 for the two byte and __le32 for the four byte cases and use the cpu_to_{le16,le32} to do the conversion before writing. This will reduce the size of the code and the number of writes as we no longer need to chop the data up before writing. As an example on ARM S3C64XX SoC, in little-endian configuration: 000000d4 <sdhci_set_adma_desc>: - d8: e1a0c423 lsr ip, r3, #8 - dc: e1a0ec21 lsr lr, r1, #24 - e0: e1a04821 lsr r4, r1, #16 - e4: e1a05421 lsr r5, r1, #8 - e8: e1a06442 asr r6, r2, #8 - ec: e5c0c001 strb ip, [r0, #1] - f0: e5c0e007 strb lr, [r0, #7] - f4: e5c04006 strb r4, [r0, #6] - f8: e5c05005 strb r5, [r0, #5] - fc: e5c01004 strb r1, [r0, #4] - 100: e5c06003 strb r6, [r0, #3] - 104: e5c02002 strb r2, [r0, #2] - 108: e5c03000 strb r3, [r0] + d4: e5801004 str r1, [r0, #4] + d8: e1c030b0 strh r3, [r0] + dc: e1c020b2 strh r2, [r0, #2] Signed-off-by: NBen Dooks <ben-linux@fluff.org> Cc: Pierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Ben Dooks 提交于
The code to write the ADMA descriptor into memory is repeated several times throughout sdhci_adma_table_pre, and thus should be moved into a common function. This will also be useful if the patch to make the write more efficient is accepted. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Cc: Pierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 23 9月, 2009 4 次提交
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由 Chris Ball 提交于
On an OLPC XO-1.5 development board with Via VX855 chipset, the sdhci controller can take up to 12ms to stabilize its clock, but the current timeout at which we give up on the controller is 10ms. The patch increases the timeout delay rather than using a device-specific quirk -- since we exit the loop when the clock comes up, increasing the timeout value will only make us mdelay() longer in the errant case of a device with a clock that is not stabilizing, which it seems worth waiting a little longer for in general. Signed-off-by: NChris Ball <cjb@laptop.org> Cc: Harald Welte <HaraldWelte@viatech.com> Acked-by: NPierre Ossman <pierre@ossman.eu> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Richard Röjfors 提交于
Add support for ADMA on SDHCI hosts, not supporting SDMA. According to the SDHCI specifications a host can support ADMA but not SDMA Signed-off-by: NRichard Röjfors <richard.rojfors@mocean-labs.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
eSDHC fails to recognize some SDHS cards, throwing timeout errors: mmc0: error -110 whilst initialising SD card That's because we calculate timeout value in a wrong way: on eSDHC hosts the timeout clock is derivied from the SD clock, which is set dynamically. As David Vrabel suggested, deriving timeout clock from SD clock is a common scheme, so let's implement DATA_TIMEOUT_USES_SDCLK quirk and use it for eSDHC hosts. Also, from now on we don't need esdhc_get_timeout_clock() callback, so remove it. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Pierre Ossman <pierre@ossman.eu> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: David Vrabel <david.vrabel@csr.com> Cc: Ben Dooks <ben@fluff.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Anton Vorontsov 提交于
get_min_clock() makes sense only with NONSTANDARD_CLOCK quirk and when set_clock() callback is specified. The patch should cause no functional changes, it just makes the code self-documented and avoids any possible misuse of get_min_clock(). Suggested-by: NPierre Ossman <pierre@ossman.eu> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Ian Molton <ian@mnementh.co.uk> Cc: Matt Fleming <matt@console-pimps.org> Cc: Philip Langdale <philipl@overt.org> Cc: Pierre Ossman <pierre@ossman.eu> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 31 7月, 2009 1 次提交
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so the page will be flushed on unmap on ARCH which need it. Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 30 7月, 2009 1 次提交
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由 Anton Vorontsov 提交于
Since commit 8dfd0374 ("MMC core: limit minimum initialization frequency to 400kHz") MMC core checks for minimum frequency, and that causes following messages flood when using eSDHC controllers: ... mmc0: Minimum clock frequency too high for identification mode mmc0: Minimum clock frequency too high for identification mode ... The warnings are legitimate, since if we'd use 133 MHz clocks for standard SDHCI controllers, we'd not able to scale frequency down to 400 kHz. But eSDHC controllers have a non-standard SD clock management, so we can divide clock by 256 * 16, not just 256. This patch introduces get_min_clock() callback for sdhci core and implements it for sdhci-of driver, and thus fixes the issue. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Cc: Matt Fleming <matt@console-pimps.org> Cc: Ian Molton <ian@mnementh.co.uk> Cc: "Roberto A. Foglietta" <roberto.foglietta@gmail.com> Cc: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 22 6月, 2009 5 次提交
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由 Pierre Ossman 提交于
Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Harald Welte 提交于
The SDHCI controller found in the VX855ES requires 10ms delay between applying power and applying clock. This issue has been discovered and documented by the OLPC XO1.5 team. Signed-off-by: NHarald Welte <HaraldWelte@viatech.com> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Anton Vorontsov 提交于
Some hosts (hardware configurations, or particular SD/MMC slots) may not support 4-bit bus. For example, on MPC8569E-MDS boards we can switch between serial (1-bit only) and nibble (4-bit) modes, thought we have to disable more peripherals to work in 4-bit mode. Along with some small core changes, this patch modifies sdhci-of driver, so that now it looks for "sdhci,1-bit-only" property in the device-tree, and if specified we enable a proper quirk. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Acked-by: NGrant Likely <grant.likely@secretlab.ca> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Ben Dooks 提交于
Add quirk to show the controller cannot do multi-block IO. This is mainly for the Samsung SDHCI controller that currently cannot manage to do multi-block PIO without timing out. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Ben Dooks 提交于
Update the ADMA error reporting to not only show the overall controller state but also to print the ADMA descriptor list. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 14 6月, 2009 2 次提交
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由 Ben Dooks 提交于
If using ADMA, then we should print the ADMA error and current pointer in sdhci_dumpregs() when any debug is requested. Signed-off-by: NBen Dooks <ben@simtec.co.uk> Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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由 Pierre Ossman 提交于
Because of granularity issues, sometimes we told the hardware to change to the voltage we were already at. Rework the logic so this doesn't happen. Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 09 4月, 2009 1 次提交
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由 Pierre Ossman 提交于
Signed-off-by: NPierre Ossman <pierre@ossman.eu>
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- 25 3月, 2009 10 次提交
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由 Anton Vorontsov 提交于
FSL eSDHC controllers can support maximum block size up to 4096 bytes, the MBL (Maximum Block Length) field in the capabilities register extended by one bit, and is set to 0x3. But the SDHCI core doesn't support blocks of 4096 bytes, and thus forces blksz to the lowest value -- 512 bytes. With this patch we can pin up the blksz to the maximum supported block size, i.e. 2048 bytes. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
FSL eSDHC controllers losing signal/interrupt enable states after reset, so we should re-enable them. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Small udelay is needed to make eSDHC work in PIO mode. Without the delay reading causes endless interrupt storm, and writing corrupts data. The first guess would be that we must wait for some bit in some register, but I didn't find any reliable bits that change before and after the delay. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
FSL eSDHC hosts have incompatible register map to manage the SDCLK. This patch adds set_clock callback so that drivers could overwrite set_clock behaviour. Similar patch[1] was posted by Ben Dooks, though in Ben's version the callback is named change_clock, plus the patch has some unrelated bits that makes the patch difficult to reuse. [1] http://lkml.org/lkml/2008/12/2/160Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Ben Dooks 提交于
Some controllers do not provide clock information in their capabilities (in the Samsung case, it is because there are multiple clock sources available to the controller). Add hooks to allow the system to supply clock information. p.s. In the original Ben's patch there was a bug that makes sdhci_add_host() return -ENODEV even if callbacks were specified. This is fixed now. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
This patch adds SDHCI_QUIRK_INVERTED_WRITE_PROTECT quirk. When specified, the sdhci driver will invert WP state. p.s. Actually, the quirk is more board-specific than controller-specific. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
This patch adds SDHCI_QUIRK_BROKEN_CARD_DETECTION quirk. When specified, sdhci driver will set MMC_CAP_NEEDS_POLL MMC host capability, and won't enable card insert/remove interrupts. This is needed for hosts with unreliable card detection, such as FSL eSDHC. The original eSDHC driver was tring to "debounce" card-detection IRQs by reading present state and disabling particular interrupts. But with this debouncing scheme I noticed that sometimes we miss card insertion/removal events. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Some hosts (that is, FSL eSDHC) throw PIO interrupts during DMA transfers, this causes tons of unneeded interrupts, and thus highly degraded speed. This patch modifies the driver so that now we only enable relevant (DMA or PIO) interrupts during transfers. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Card detection interrupts should be handled separately as they should not be enabled before mmc_add_host() returns and should be disabled before calling mmc_remove_host(). The same is for suspend and resume routines. sdhci_init() no longer enables card-detection irqs. Instead, two new functions implemented: sdhci_enable_card_detection() and sdhci_disable_card_detection(). New sdhci_reinit() call implemented to behave the same way as the old sdhci_init(). Also, this patch implements and uses few new helpers to manage IRQs in a more conveinient way, that is: - sdhci_clear_set_irqs() - sdhci_unmask_irqs() - sdhci_mask_irqs() - SDHCI_INT_ALL_MASK constant sdhci_enable_sdio_irq() converted to these new helpers, plus the helpers will be used by the subsequent patches. Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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由 Anton Vorontsov 提交于
Currently the SDHCI driver works with PCI accessors (write{l,b,w} and read{l,b,w}). With this patch drivers may change memory accessors, so that we can support hosts with "weird" IO memory access requirments. For example, in "FSL eSDHC" SDHCI hardware all registers are 32 bit width, with big-endian addressing. That is, readb(0x2f) should turn into readb(0x2c), and readw(0x2c) should be translated to le16_to_cpu(readw(0x2e)). Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 03 3月, 2009 1 次提交
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由 Ben Dooks 提交于
The Samsung SDHCI (and FSL eSDHC) controller block seems to fail to generate an INT_DATA_END after the transfer has completed and the bus busy state finished. Changes in e809517f to use the new busy method are the cause of the behaviour change. Signed-off-by: NBen Dooks <ben-linux@fluff.org> Signed-off-by: NAnton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 19 2月, 2009 1 次提交
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由 Helmut Schaa 提交于
Fix the led device naming for the sdhci driver. The led class documentation defines the led name to have the form "devicename:colour:function" while not applicable sections should be left blank. To comply with the documentation the led device name is changed from "mmc*" to "mmc*::". Signed-off-by: NHelmut Schaa <helmut.schaa@googlemail.com> Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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- 18 2月, 2009 1 次提交
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由 Pierre Ossman 提交于
This reverts commit a4b76193. It turned out that the controller had problem running at the higher speed, so go back to trusting the hardware capability bits. Signed-off-by: NPierre Ossman <drzeus@drzeus.cx>
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