1. 18 2月, 2009 18 次提交
  2. 17 2月, 2009 3 次提交
  3. 16 2月, 2009 2 次提交
  4. 15 2月, 2009 4 次提交
    • Y
      x86: make 32bit to call enable_IO_APIC early like 64bit · 88d0f550
      Yinghai Lu 提交于
      Impact: cleanup
      
      So we remove some #ifdefs.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      88d0f550
    • T
      x86, vm86: fix preemption bug · be716615
      Thomas Gleixner 提交于
      Commit 3d2a71a5 ("x86, traps: converge
      do_debug handlers") changed the preemption disable logic of do_debug()
      so vm86_handle_trap() is called with preemption disabled resulting in:
      
       BUG: sleeping function called from invalid context at include/linux/kernel.h:155
       in_atomic(): 1, irqs_disabled(): 0, pid: 3005, name: dosemu.bin
       Pid: 3005, comm: dosemu.bin Tainted: G        W  2.6.29-rc1 #51
       Call Trace:
        [<c050d669>] copy_to_user+0x33/0x108
        [<c04181f4>] save_v86_state+0x65/0x149
        [<c0418531>] handle_vm86_trap+0x20/0x8f
        [<c064e345>] do_debug+0x15b/0x1a4
        [<c064df1f>] debug_stack_correct+0x27/0x2c
        [<c040365b>] sysenter_do_call+0x12/0x2f
       BUG: scheduling while atomic: dosemu.bin/3005/0x10000001
      
      Restore the original calling convention and reenable preemption before
      calling handle_vm86_trap().
      Reported-by: NMichal Suchanek <hramrach@centrum.cz>
      Cc: stable@kernel.org
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      be716615
    • Y
      x86: fix typo in filter_cpuid_features() · f6db44df
      Yinghai Lu 提交于
      Impact: fix wrong disabling of cpu features
      
      an amd system got this strange output:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
      
      but in /proc/cpuinfo I have:
      
       cpuid level	: 5
      
      on intel system:
      
       CPU: CPU feature monitor disabled due to lack of CPUID level 0x5
       CPU: CPU feature dca disabled due to lack of CPUID level 0x9
      
      but in /proc/cpuinfo i have:
      
       cpuid level     : 11
      
      Tt turns out there is a typo, and we should use level member in df.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      f6db44df
    • C
      x86, olpc: fix model detection without OFW · e49590b6
      Chris Ball 提交于
      Impact: fix "garbled display, laptop is unusable" bug
      
      Commit e51a1ac2 ("x86, olpc: fix endian
      bug in openfirmware workaround") breaks model comparison on OLPC; the value
      0xc2 needs to be scaled up by olpc_board().
      
      The pre-patch version was wrong, but accidentally worked anyway
      (big-endian 0xc2 is big enough to satisfy all other board revisions,
      but little endian 0xc2 is not).
      Signed-off-by: NChris Ball <cjb@laptop.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Acked-by: NAndres Salomon <dilinger@queued.net>
      Cc: Harvey Harrison <harvey.harrison@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e49590b6
  5. 14 2月, 2009 1 次提交
  6. 13 2月, 2009 3 次提交
    • J
      x86, hpet: fix for LS21 + HPET = boot hang · b13e2464
      john stultz 提交于
      Between 2.6.23 and 2.6.24-rc1 a change was made that broke IBM LS21
      systems that had the HPET enabled in the BIOS, resulting in boot hangs
      for x86_64.
      
      Specifically commit b8ce3359, which
      merges the i386 and x86_64 HPET code.
      
      Prior to this commit, when we setup the HPET timers in x86_64, we did
      the following:
      
      	hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
                          HPET_TN_32BIT, HPET_T0_CFG);
      
      However after the i386/x86_64 HPET merge, we do the following:
      
      	cfg = hpet_readl(HPET_Tn_CFG(timer));
      	cfg |= HPET_TN_ENABLE | HPET_TN_PERIODIC |
      			HPET_TN_SETVAL | HPET_TN_32BIT;
      	hpet_writel(cfg, HPET_Tn_CFG(timer));
      
      However on LS21s with HPET enabled in the BIOS, the HPET_T0_CFG register
      boots with Level triggered interrupts (HPET_TN_LEVEL) enabled. This
      causes the periodic interrupt to be not so periodic, and that results in
      the boot time hang I reported earlier in the delay calibration.
      
      My fix: Always disable HPET_TN_LEVEL when setting up periodic mode.
      Signed-off-by: NJohn Stultz <johnstul@us.ibm.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b13e2464
    • T
      x86: warn if arch_flush_lazy_mmu_cpu is called in preemptible context · 34b0900d
      Thomas Gleixner 提交于
      Impact: Catch cases where lazy MMU state is active in a preemtible context
      
      arch_flush_lazy_mmu_cpu() has been changed to disable preemption so
      the checks in enter/leave will never trigger. Put the preemtible()
      check into arch_flush_lazy_mmu_cpu() to catch such cases.
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      34b0900d
    • J
      x86/paravirt: make arch_flush_lazy_mmu/cpu disable preemption · d85cf93d
      Jeremy Fitzhardinge 提交于
      Impact: avoid access to percpu vars in preempible context
      
      They are intended to be used whenever there's the possibility
      that there's some stale state which is going to be overwritten
      with a queued update, or to force a state change when we may be
      in lazy mode.  Either way, we could end up calling it with
      preemption enabled, so wrap the functions in their own little
      preempt-disable section so they can be safely called in any
      context (though preemption should never be enabled if we're actually
      in a lazy state).
      
      (Move out of line to avoid #include dependencies.)
      Signed-off-by: NJeremy Fitzhardinge <jeremy.fitzhardinge@citrix.com>
      Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
      d85cf93d
  7. 12 2月, 2009 3 次提交
    • H
      x86: merge sys_rt_sigreturn between 32 and 64 bits · 74452509
      H. Peter Anvin 提交于
      Impact: cleanup
      
      With the recent changes in the 32-bit code to make system calls which
      use struct pt_regs take a pointer, sys_rt_sigreturn() have become
      identical between 32 and 64 bits, and both are empty wrappers around
      do_rt_sigreturn().  Remove both wrappers and rename both to
      sys_rt_sigreturn().
      
      Cc: Brian Gerst <brgerst@gmail.com>
      Cc: Tejun Heo <tj@kernel.org>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      74452509
    • B
      x86: use regparm(3) for passed-in pt_regs pointer · b12bdaf1
      Brian Gerst 提交于
      Some syscalls need to access the pt_regs structure, either to copy
      user register state or to modifiy it.  This patch adds stubs to load
      the address of the pt_regs struct into the %eax register, and changes
      the syscalls to take the pointer as an argument instead of relying on
      the assumption that the pt_regs structure overlaps the function
      arguments.
      
      Drop the use of regparm(1) due to concern about gcc bugs, and to move
      in the direction of the eventual removal of regparm(0) for asmlinkage.
      Signed-off-by: NBrian Gerst <brgerst@gmail.com>
      Signed-off-by: NH. Peter Anvin <hpa@linux.intel.com>
      b12bdaf1
    • J
      x86: kernel/mpparse.c fix compilation warnings · ba1511bf
      Jaswinder Singh Rajput 提交于
       arch/x86/kernel/mpparse.c: In function ‘smp_scan_config’:
       arch/x86/kernel/mpparse.c:696: warning: format ‘%08lx’ expects type ‘long unsigned int’, but argument 3 has type ‘phys_addr_t’
       arch/x86/kernel/mpparse.c: In function ‘update_mp_table’:
       arch/x86/kernel/mpparse.c:1014: warning: format ‘%lx’ expects type ‘long unsigned int’, but argument 2 has type ‘phys_addr_t’
      Signed-off-by: NJaswinder Singh Rajput <jaswinderrajput@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ba1511bf
  8. 11 2月, 2009 6 次提交