- 22 10月, 2015 1 次提交
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由 Rob Herring 提交于
Move the Calxeda memory controller and PHY bindings to appropriate subsystem directories. Signed-off-by: NRob Herring <robh@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org>
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- 05 11月, 2013 1 次提交
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由 Rob Herring 提交于
The DDR controller is slightly different in ECX-2000 and ECX-1000, so we need to have different nodes for each platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> [Device Tree documentation updated.] Signed-off-by: NRobert Richter <rric@kernel.org>
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- 27 6月, 2012 1 次提交
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由 Rob Herring 提交于
Add support for memory controller on Calxeda Highbank platforms. Highbank platforms support a single 4GB mini-DIMM with 1-bit correction and 2-bit detection. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NMauro Carvalho Chehab <mchehab@redhat.com>
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