- 10 11月, 2016 1 次提交
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由 Bing Niu 提交于
On guest writing a PPGTT entry, if it contains value and the old entry is valid, gvt will read it and find & free the corresponding old data for it. However, with the KVM write protection provided by page_track, the guest entry will be written with new value before gvt handling. To avoid that, we should use the shadow entry instead. Signed-off-by: NBing Niu <bing.niu@intel.com> Signed-off-by: NJike Song <jike.song@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 07 11月, 2016 1 次提交
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由 Ping Gao 提交于
All the unused entries in the page table tree(PML4E->PDPE->PDE->PTE) should point to scratch page table/scratch page to avoid page walk error due to the page prefetching. When removing an entry in shadow PPGTT, it need map to scratch page also, the older implementation use single scratch page to assign to all level entries, it doesn't align the page walk behavior when removed entry is in PML, PDP, PD. To avoid potential page walk error this patch implement a scratch page tree to replace the single scratch page. v2: more details in commit message address Kevin's comments. Signed-off-by: NPing Gao <ping.a.gao@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 25 10月, 2016 2 次提交
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由 Jérémy Lefaure 提交于
It is better to use %p format for void pointers instead of casting them because a void* is not necessary a 64 bits value. Signed-off-by: NJérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Jérémy Lefaure 提交于
Since ioread32 returns a 32-bit value, it is impossible to left-shift this value by 32 bits (it produces a compilation error). Casting the return value of ioread32 fix this issue. Signed-off-by: NJérémy Lefaure <jeremy.lefaure@lse.epita.fr> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 20 10月, 2016 5 次提交
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由 Du, Changbin 提交于
Function create_scratch_page() may fail in some cases. Signed-off-by: NDu, Changbin <changbin.du@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Du, Changbin 提交于
The function return values should has type int if it return a integer value. Signed-off-by: NDu, Changbin <changbin.du@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Du, Changbin 提交于
Mark all local functions & variables as static. Signed-off-by: NDu, Changbin <changbin.du@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Du, Changbin 提交于
Add proper __iomem annotation for pointers obtained via ioremap(). Signed-off-by: NDu, Changbin <changbin.du@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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由 Zhenyu Wang 提交于
i915 core should only call functions and structures exposed through intel_gvt.h. Remove internal gvt.h and i915_pvinfo.h. Change for internal intel_gvt structure as private handler which not requires to expose gvt internal structure for i915 core. v2: Fix per Chris's comment - carefully handle dev_priv->gvt assignment - add necessary bracket for macro helper - forward declartion struct intel_gvt - keep free operation within same file handling alloc v3: fix use after free and remove intel_gvt.initialized v4: change to_gvt() to an inline Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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- 14 10月, 2016 1 次提交
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由 Zhi Wang 提交于
The vGPU graphics memory emulation framework is responsible for graphics memory table virtualization. Under virtualization environment, a VM will populate the page table entry with guest page frame number(GPFN/GFN), while HW needs a page table filled with MFN(Machine frame number). The relationship between GFN and MFN(Machine frame number) is managed by hypervisor, while GEN HW doesn't have such knowledge to translate a GFN. To solve this gap, shadow GGTT/PPGTT page table is introdcued. For GGTT, the GFN inside the guest GGTT page table entry will be translated into MFN and written into physical GTT MMIO registers when guest write virtual GTT MMIO registers. For PPGTT, a shadow PPGTT page table will be created and write-protected translated from guest PPGTT page table. And the shadow page table root pointers will be written into the shadow context after a guest workload is shadowed. vGPU graphics memory emulation framework consists: - Per-GEN HW platform page table entry bits extract/de-extract routines. - GTT MMIO register emulation handlers, which will call hypercall to do GFN->MFN translation when guest write GTT MMIO register - PPGTT shadow page table routines, e.g. shadow create/destroy/out-of-sync Signed-off-by: NZhi Wang <zhi.a.wang@intel.com> Signed-off-by: NZhenyu Wang <zhenyuw@linux.intel.com>
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