1. 13 4月, 2013 2 次提交
  2. 11 4月, 2013 3 次提交
  3. 09 4月, 2013 4 次提交
  4. 05 4月, 2013 3 次提交
  5. 04 4月, 2013 2 次提交
  6. 03 4月, 2013 2 次提交
    • M
      clk: allow reentrant calls into the clk framework · 533ddeb1
      Mike Turquette 提交于
      Reentrancy into the clock framework is necessary for clock operations
      that result in nested calls to the clk api.  A common example is a clock
      that is prepared via an i2c transaction, such as a clock inside of a
      discrete audio chip or a power management IC.  The i2c subsystem itself
      will use the clk api resulting in a deadlock:
      
      clk_prepare(audio_clk)
      	i2c_transfer(..)
      		clk_prepare(i2c_controller_clk)
      
      The ability to reenter the clock framework prevents this deadlock.
      
      Other use cases exist such as allowing .set_rate callbacks to call
      clk_set_parent to achieve the best rate, or to save power in certain
      configurations.  Yet another example is performing pinctrl operations
      from a clk_ops callback.  Calls into the pinctrl subsystem may call
      clk_{un}prepare on an unrelated clock.  Allowing for nested calls to
      reenter the clock framework enables both of these use cases.
      
      Reentrancy is implemented by two global pointers that track the owner
      currently holding a global lock.  One pointer tracks the owner during
      sleepable, mutex-protected operations and the other one tracks the owner
      during non-interruptible, spinlock-protected operations.
      
      When the clk framework is entered we try to hold the global lock.  If it
      is held we compare the current task against the current owner; a match
      implies a nested call and we reenter.  If the values do not match then
      we block on the lock until it is released.
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
      Cc: David Brown <davidb@codeaurora.org>
      Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
      533ddeb1
    • M
      clk: abstract locking out into helper functions · eab89f69
      Mike Turquette 提交于
      Create locking helpers for the global mutex and global spinlock.  The
      definitions of these helpers will be expanded upon in the next patch
      which introduces reentrancy into the locking scheme.
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      Cc: Rajagopal Venkat <rajagopal.venkat@linaro.org>
      Cc: David Brown <davidb@codeaurora.org>
      Tested-by: NLaurent Pinchart <laurent.pinchart@ideasonboard.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
      eab89f69
  7. 27 3月, 2013 5 次提交
    • M
      clk: zynq: Add missing zynq clk header · 43c4120c
      Michal Simek 提交于
      Include zynq clk header where init function is declared.
      
      It removes this sparse warning:
      drivers/clk/clk-zynq.c:373:13: warning: symbol
      'xilinx_zynq_clocks_init' was not declared. Should it be static?
      Signed-off-by: NMichal Simek <michal.simek@xilinx.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      43c4120c
    • E
      clk: sunxi: rename compatible strings · e3276998
      Emilio López 提交于
      During the introduction of the Allwinner SoC platforms, sunxi was
      initially meant as a generic name for all the variants of the Allwinner
      SoC.
      
      It was ok at the time of the support of only the A10 and A13 that
      look pretty much the same; but it's beginning to be troublesome with
      the future addition of the Allwinner A31 (sun6i) that is quite
      different, and would introduce some weird logic, where sunxi would
      actually mean in some case sun4i and sun5i but without sun6i...
      
      Moreover, it makes the compatible strings naming scheme not consistent
      with other architectures, where usually for this kind of compability, we
      just use the oldest SoC name that has this IP, so let's do just this.
      Signed-off-by: NEmilio López <emilio@elopez.com.ar>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      e3276998
    • E
      clk: arm: sunxi: Add a new clock driver for sunxi SOCs · e874a669
      Emilio López 提交于
      This commit implements the base CPU clocks for sunxi devices. It has
      been tested using a slightly modified cpufreq driver from the
      linux-sunxi 3.0 tree.
      
      Additionally, document the new bindings introduced by this patch.
      
      Idling:
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            60000000
                    cpu                   0           0            60000000
                       axi                0           0            60000000
                          ahb             0           0            60000000
                             apb0         0           0            30000000
           dummy                          0           0            0
      
      After "yes >/dev/null &":
          / # cat /sys/kernel/debug/clk/clk_summary
             clock                        enable_cnt  prepare_cnt  rate
          ---------------------------------------------------------------------
           osc32k                         0           0            32768
           osc24M_fixed                   0           0            24000000
              osc24M                      0           0            24000000
                 apb1_mux                 0           0            24000000
                    apb1                  0           0            24000000
                 pll1                     0           0            1008000000
                    cpu                   0           0            1008000000
                       axi                0           0            336000000
                          ahb             0           0            168000000
                             apb0         0           0            84000000
           dummy                          0           0            0
      Signed-off-by: NEmilio López <emilio@elopez.com.ar>
      Acked-by: NMaxime Ripard <maxime.ripard@free-electrons.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      e874a669
    • M
      clk: ux500: Fix prcmu clocks registration · b5489168
      Maxime Coquelin 提交于
      In clk_reg_prcmu(), clk->hw.init field is assigned with a
      reference local to clk_reg_prcmu() function.
      
      This patch replaces references to clk->hw.init with calls
      to __clk_get_name when called after clock registration.
      
      This patch applies on top of v3.9-rc4.
      Signed-off-by: NMaxime Coquelin <maxime.coquelin@st.com>
      Acked-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      [mturquette@linaro.org: resolved trivial merge issues]
      b5489168
    • P
      clk: Add composite clock type · ece70094
      Prashant Gaikwad 提交于
      Not all clocks are required to be decomposed into basic clock
      types but at the same time want to use the functionality
      provided by these basic clock types instead of duplicating.
      
      For example, Tegra SoC has ~100 clocks which can be decomposed
      into Mux -> Div -> Gate clock types making the clock count to
      ~300. Also, parent change operation can not be performed on gate
      clock which forces to use mux clock in driver if want to change
      the parent.
      
      Instead aggregate the basic clock types functionality into one
      clock and just use this clock for all operations. This clock
      type re-uses the functionality of basic clock types and not
      limited to basic clock types but any hardware-specific
      implementation.
      Signed-off-by: NPrashant Gaikwad <pgaikwad@nvidia.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      ece70094
  8. 23 3月, 2013 3 次提交
  9. 22 3月, 2013 1 次提交
  10. 20 3月, 2013 6 次提交
  11. 15 3月, 2013 2 次提交
    • A
      mfd: twl4030-madc: Remove __exit_p annotation · 03715410
      Arnd Bergmann 提交于
      4740f73f "mfd: remove use of __devexit" removed the __devexit annotation
      on the twl4030_madc_remove function, but left an __exit_p() present on the
      pointer to this function. Using __exit_p was as wrong with the devexit in
      place as it is now, but now we get a gcc warning about an unused function.
      
      In order for the twl4030_madc_remove to work correctly in built-in code, we
      have to remove the __exit_p.
      
      Cc: Bill Pemberton <wfp5p@virginia.edu>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      Signed-off-by: NSamuel Ortiz <sameo@linux.intel.com>
      03715410
    • G
      hwmon: (pmbus/ltc2978) Fix temperature reporting · 8c958c70
      Guenter Roeck 提交于
      On LTC2978, only READ_TEMPERATURE is supported. It reports
      the internal junction temperature. This register is unpaged.
      
      On LTC3880, READ_TEMPERATURE and READ_TEMPERATURE2 are supported.
      READ_TEMPERATURE is paged and reports external temperatures.
      READ_TEMPERATURE2 is unpaged and reports the internal junction
      temperature.
      Signed-off-by: NGuenter Roeck <linux@roeck-us.net>
      Cc: stable@vger.kernel.org # 3.2+
      Acked-by: NJean Delvare <khali@linux-fr.org>
      8c958c70
  12. 14 3月, 2013 6 次提交
  13. 13 3月, 2013 1 次提交