It hasn't been used in ages, and having the user tell your how much
memory is being freed at free time is a recipe for disaster even if it
was ever used.
Signed-off-by: NEric Anholt <eric@anholt.net>

The fence register value also depends upon the stride of the object, so we
need to clear the fence if that is changed as well.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
[anholt: Added 8xx and 965 paths, and renamed the confusing
i915_gem_object_tiling_ok function to i915_gem_object_fence_offset_ok]
Signed-off-by: NEric Anholt <eric@anholt.net>

With the work by Jesse Barnes to eliminate allocation of fences during
execbuffer, it becomes possible to write to the scan-out buffer with it
never acquiring a fence (simply by only ever writing to the object using
tiled GPU commands and never writing to it via the GTT). So for pre-i965
chipsets which require fenced access for tiled scan-out buffers, we need
to obtain a fence register.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: NEric Anholt <eric@anholt.net>

After performing an operation over the page list for a buffer retrieved by
i915_gem_object_get_pages() the pages need to be returned with
i915_gem_object_put_pages(). This was not being observed for the phys
objects which were thus leaking references to their backing pages.
Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
CC: Dave Airlie <airlied@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

Signed-Off-By: NBen Gamari <bgamari.foss@gmail.com>
Signed-off-by: NEric Anholt <eric@anholt.net>

While sifting through the inteldrmfb code trying to solve #22040 I found that
the fb restore path doesn't check the return value of
drm_crtc_helper_set_config(), which seems to have all sorts of potential
failure modes. We should warn someone if one of these is triggered.
Signed-Off-By: NBen Gamari <bgamari.foss@gmail.com>
Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
[anholt: hand-applied, failures are mine]
Signed-off-by: NEric Anholt <eric@anholt.net>

* 'kmemleak' of git://linux-arm.org/linux-2.6:
  kmemleak: Fix some typos in comments
  kmemleak: Rename kmemleak_panic to kmemleak_stop
  kmemleak: Only use GFP_KERNEL|GFP_ATOMIC for the internal allocations

Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>

This is to avoid the confusion created by the "panic" word.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Acked-by: NPekka Enberg <penberg@cs.helsinki.fi>

Kmemleak allocates memory for pointer tracking and it tries to avoid
using GFP_ATOMIC if the caller doesn't require it. However other gfp
flags may be passed by the caller which aren't required by kmemleak.
This patch filters the gfp flags so that only GFP_KERNEL | GFP_ATOMIC
are used.
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
Acked-by: NPekka Enberg <penberg@cs.helsinki.fi>

* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/davej/cpufreq:
  [CPUFREQ] cpumask: new cpumask operators for arch/x86/kernel/cpu/cpufreq/powernow-k8.c
  [CPUFREQ] cpumask: avoid playing with cpus_allowed in powernow-k8.c
  [CPUFREQ] cpumask: avoid cpumask games in arch/x86/kernel/cpu/cpufreq/speedstep-centrino.c
  [CPUFREQ] cpumask: avoid playing with cpus_allowed in speedstep-ich.c
  [CPUFREQ] powernow-k8: get drv data for correct CPU
  [CPUFREQ] powernow-k8: read P-state from HW
  [CPUFREQ] reduce scope of ACPI_PSS_BIOS_BUG_MSG[]
  [CPUFREQ] Clean up convoluted code in arch/x86/kernel/tsc.c:time_cpufreq_notifier()
  [CPUFREQ] minor correction to cpu-freq documentation
  [CPUFREQ] powernow-k8.c: mess cleanup
  [CPUFREQ] Only set sampling_rate_max deprecated, sampling_rate_min is useful
  [CPUFREQ] powernow-k8: Set transition latency to 1 if ACPI tables export 0
  [CPUFREQ] ondemand: Uncouple minimal sampling rate from HZ in NO_HZ case

* git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi-misc-2.6:
  [SCSI] aic79xx: make driver respect nvram for IU and QAS settings
  [SCSI] don't attach ULD to Dell Universal Xport
  [SCSI] lpfc 8.3.3 : Update driver version to 8.3.3
  [SCSI] lpfc 8.3.3 : Add support for Target Reset handler entrypoint
  [SCSI] lpfc 8.3.3 : Fix a couple of spin_lock and memory issues and a crash
  [SCSI] lpfc 8.3.3 : FC/FCOE discovery fixes
  [SCSI] lpfc 8.3.3 : Fix various SLI-3 vs SLI-4 differences
  [SCSI] qla2xxx: Resolve a performance issue in interrupt
  [SCSI] cnic, bnx2i: Fix build failure when CONFIG_PCI is not set.
  [SCSI] nsp_cs: time_out reaches -1
  [SCSI] qla2xxx: fix printk format warnings
  [SCSI] ncr53c8xx: div reaches -1
  [SCSI] compat: don't perform unneeded copy in sg_io code
  [SCSI] zfcp: Update FC pass-through support
  [SCSI] zfcp: Add FC pass-through support
  [SCSI] FC Pass Thru support

* 'linux-next' of git://git.infradead.org/ubi-2.6: (21 commits)
  UBI: add reboot notifier
  UBI: handle more error codes
  UBI: fix multiple spelling typos
  UBI: fix kmem_cache_free on error patch
  UBI: print amount of reserved PEBs
  UBI: improve messages in the WL worker
  UBI: make gluebi a separate module
  UBI: remove built-in gluebi
  UBI: add notification API
  UBI: do not switch to R/O mode on read errors
  UBI: fix and clean-up error paths in WL worker
  UBI: introduce new constants
  UBI: fix race condition
  UBI: minor serialization fix
  UBI: do not panic if volume check fails
  UBI: add dump_stack in checking code
  UBI: fix races in I/O debugging checks
  UBI: small debugging code optimization
  UBI: improve debugging messages
  UBI: re-name volumes_mutex to device_mutex
  ...

* 'linux-next' of git://git.infradead.org/ubifs-2.6:
  UBIFS: start using hrtimers
  hrtimer: export ktime_add_safe
  UBIFS: do not forget to register BDI device
  UBIFS: allow sync option in rootflags
  UBIFS: remove dead code
  UBIFS: use anonymous device
  UBIFS: return proper error code if the compr is not present
  UBIFS: return error if link and unlink race
  UBIFS: reset no_space flag after inode deletion

For it is only in linux-next at this stage.

Cc: Wu Fengguang <fengguang.wu@intel.com>
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Alexey Dobriyan <adobriyan@gmail.com>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: Pekka Enberg <penberg@cs.helsinki.fi>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This causes an issue since we fixed the drm mappings to do the right thing,
so its just a copy and pasto.
Signed-off-by: NDave Airlie <airlied@redhat.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/penberg/slab-2.6:
  SLUB: Fix early boot GFP_DMA allocations
  SLUB: Don't print out OOM warning for __GFP_NOFAIL
  SLUB: fix build when !SLUB_DEBUG
  SLUB: Out-of-memory diagnostics
  slab: document kzfree() zeroing behavior
  slab: fix generic PAGE_POISONING conflict with SLAB_RED_ZONE
  slob: use PG_slab for identifying SLOB pages

* 'upstream' of git://ftp.linux-mips.org/pub/scm/upstream-linus: (47 commits)
  MIPS: Add hibernation support
  MIPS: Move Cavium CP0 hwrena impl bits to cpu-feature-overrides.h
  MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.
  MIPS: Kconfig Add SYS_SUPPORTS_HUGETLBFS and enable it for some systems.
  Hugetlbfs: Enable hugetlbfs for more systems in Kconfig.
  MIPS: TLB support for hugetlbfs.
  MIPS: Add hugetlbfs page defines.
  MIPS: Add support files for hugetlbfs.
  MIPS: Remove unused parameters from iPTE_LW.
  Staging: Add octeon-ethernet driver files.
  MIPS: Export erratum function needed by octeon-ethernet driver.
  MIPS: Cavium-Octeon: Add more chip specific feature tests.
  MIPS: Cavium-Octeon: Add more board type constants.
  MIPS: Export cvmx_sysinfo_get needed by octeon-ethernet driver.
  MIPS: Add named alloc functions to OCTEON boot monitor memory allocator.
  MIPS: Alchemy: devboards: Convert to gpio calls.
  MIPS: Alchemy: xxs1500: use linux gpio api.
  MIPS: Alchemy: MTX-1: Use linux gpio api.
  MIPS: Alchemy: Rewrite GPIO support.
  MIPS: Alchemy: Remove unused au1000_gpio.h header
  ...

* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs-2.6:
  get rid of BKL in fs/sysv
  get rid of BKL in fs/minix
  get rid of BKL in fs/efs
  befs ->pust_super() doesn't need BKL
  Cleanup of adfs headers
  9P doesn't need BKL in ->umount_begin()
  fuse doesn't need BKL in ->umount_begin()
  No instance of ->bmap() needs BKL
  remove unlock_kernel() left accidentally
  ext4: avoid unnecessary spinlock in critical POSIX ACL path
  ext3: avoid unnecessary spinlock in critical POSIX ACL path

[Ralf: SMP support requires CPU hotplugging which MIPS currently doesn't
support.  As implemented in this patch cache and tlb flushing will also be
invoked with interrupts disabled so smp_call_function() will blow up in
charming ways.  So limit to !SMP.]
Reviewed-by: NPavel Machek <pavel@ucw.cz>
Reviewed-by: NYan Hua <yanh@lemote.com>
Reviewed-by: NArnaud Patard <apatard@mandriva.com>
Reviewed-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NWu Zhangjin <wuzj@lemote.com>
Signed-off-by: NHu Hongbing <huhb@lemote.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

We had an ugly #ifdef for Cavium Octeon hwrena bits in traps.c, remove
it to mach-cavium-octeon/cpu-feature-overrides.h
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some CPUs have implementation dependent rdhwr registers.  Allow them
to be enabled on a per CPU basis.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add new kconfig variables SYS_SUPPORTS_HUGETLBFS and
CPU_SUPPORTS_HUGEPAGES.  They are enabled for systems that are known
to support huge pages.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

As part of adding hugetlbfs support for MIPS, I am adding a new
kconfig variable 'SYS_SUPPORTS_HUGETLBFS'.  Since some mips cpu
varients don't yet support it, we can enable selection of HUGETLBFS on
a system by system basis from the arch/mips/Kconfig.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
CC: William Irwin <wli@holomorphy.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The TLB handlers need to check for huge pages and give them special
handling.  Huge pages consist of two contiguous sub-pages of physical
memory.

* Loading entrylo0 and entrylo1 need to be handled specially.

* The page mask must be set for huge pages and then restored after
  writing the TLB entries.

* The PTE for huge pages resides in the PMD, we halt traversal of the
  tables there.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The l parameter to iPTE_LW() is unused. Remove it and from some of its
callers as well.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The octeon-ethernet driver supports the sgmii, rgmii, spi, and xaui
ports present on the Cavium OCTEON family of SOCs.  These SOCs are
multi-core mips64 processors with existing support over in arch/mips.

The driver files can be categorized into three basic groups:

1) Register definitions, these are named cvmx-*-defs.h

2) Main driver code, these have names that don't start cvmx-.

3) Interface specific functions and other utility code, names starting
with cvmx-
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The octeon-ethernet driver needs to check for additional chip specific
features, we add them to the octeon_has_feature() framework.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The bootloader now uses additional board type constants.  The
octeon-ethernet driver needs some of the new values.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The various Octeon ethernet drivers use these new functions.
Signed-off-by: NDavid Daney <ddaney@caviumnetworks.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replace a few open-coded GPIO register accesses with gpio calls.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replace a few GPIO register accesses in the board init code with calls to
the gpio api.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Replace a few GPIO register accesses in the board init code with calls
to the gpio api.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

The current in-kernel Alchemy GPIO support is far too inflexible for
all my use cases.  To address this, the following changes are made:

* create generic functions which deal with manipulating the on-chip
  GPIO1/2 blocks.  Such functions are universally useful.
* Macros for GPIO2 shared interrupt management and block control.
* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.

  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework
  compatibility by directly inlining the GPIO1/2 functions.  GPIO access
  is limited to on-chip ones and they can be accessed as documented in
  the datasheets (GPIO0-31 and 200-215).

  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and
  one for GPIO2, are registered.  GPIOs can still be accessed by using
  the numberspace established in the databooks.

  However this is not yet flexible enough for my uses:  My Alchemy
  systems have a documented "external" gpio interface (fixed, different
  numberspace) and can support a variety of baseboards, some of which
  are equipped with I2C gpio expanders.  I want to be able to provide
  the default 16 GPIOs of the CPU board numbered as 0..15 and also
  support gpio expanders, if present, starting as gpio16.

  To achieve this, a new Kconfig symbol for Alchemy is introduced,
  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal
  that they don't want the Alchemy numberspace exposed to the outside
  world, but instead want to provide their own.  Boards are now respon-
  sible for providing the linux gpio interface glue code (either in a
  custom gpio.h header (in board include directory) or with gpio_chips).

  To make the board-specific inlined gpio functions work, the MIPS
  Makefile must be changed so that the mach-au1x00/gpio.h header is
  included _after_ the board headers, by moving the inclusion of
  the mach-au1x00/ to the end of the header list.

  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.
Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Acked-by: NFlorian Fainelli <florian@openwrt.org>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NManuel Lauss <manuel.lauss@gmail.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

gpio_direction_output should also set an output value according to the API.

Signed-off-by: Matthieu CASTET <castet.matthieu@free.fr> 
Acked-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>