1. 03 4月, 2013 1 次提交
  2. 28 3月, 2013 6 次提交
  3. 27 3月, 2013 1 次提交
  4. 23 3月, 2013 1 次提交
  5. 12 3月, 2013 1 次提交
  6. 05 3月, 2013 3 次提交
  7. 22 2月, 2013 1 次提交
  8. 14 2月, 2013 1 次提交
  9. 20 1月, 2013 3 次提交
    • V
      drm/i915: Provide the quantization range in the AVI infoframe · abedc077
      Ville Syrjälä 提交于
      The AVI infoframe is able to inform the display whether the source is
      sending full or limited range RGB data.
      
      As per CEA-861 [1] we must first check whether the display reports the
      quantization range as selectable, and if so we can set the approriate
      bits in the AVI inforframe.
      
      [1] CEA-861-E - 6.4 Format of Version 2 AVI InfoFrame
      
      v2: Give the Q bits better names, add spec chapter information
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      abedc077
    • V
      drm/i915: Add "Automatic" mode for the "Broadcast RGB" property · 55bc60db
      Ville Syrjälä 提交于
      Add a new "Automatic" mode to the "Broadcast RGB" range property.
      When selected the driver automagically selects between full range and
      limited range output.
      
      Based on CEA-861 [1] guidelines, limited range output is selected if the
      mode is a CEA mode, except 640x480. Otherwise full range output is used.
      Additionally DVI monitors should most likely default to full range
      always.
      
      As per DP1.2a [2] DisplayPort should always use full range for 18bpp, and
      otherwise will follow CEA-861 rules.
      
      NOTE: The default value for the property will now be "Automatic"
      so some people may be affected in case they're relying on the
      current full range default.
      
      [1] CEA-861-E - 5.1 Default Encoding Parameters
      [2] VESA DisplayPort Ver.1.2a - 5.1.1.1 Video Colorimetry
      
      v2: Use has_hdmi_sink to check if a HDMI monitor is present
      v3: Add information about relevant spec chapters
      Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      55bc60db
    • V
      drm/i915: Fix RGB color range property for PCH platforms · 3685a8f3
      Ville Syrjälä 提交于
      The RGB color range select bit on the DP/SDVO/HDMI registers
      disappeared when PCH was introduced, and instead a new PIPECONF bit
      was added that performs the same function.
      
      Add a new INTEL_MODE_LIMITED_COLOR_RANGE private mode flag, and set
      it in the encoder mode_fixup if limited color range is requested.
      Set the the PIPECONF bit 13 based on the flag.
      
      Experimentation showed that simply toggling the bit while the pipe is
      active doesn't work. We need to restart the pipe, which luckily already
      happens.
      
      The DP/SDVO/HDMI bit 8 is marked MBZ in the docs, so avoid setting it,
      although it doesn't seem to do any harm in practice.
      
      TODO:
      - the PIPECONF bit too seems to have disappeared from HSW. Need a
        volunteer to test if it's just a documentation issue or if it's really
        gone. If the bit is gone and no easy replacement is found, then I suppose
        we may need to use the pipe CSC unit to perform the range compression.
      
      v2: Use mode private_flags instead of intel_encoder virtual functions
      v3: Moved the intel_dp color_range handling after bpc check to help
          later patches
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=46800Reviewed-by: NPaulo Zanoni <paulo.r.zanoni@intel.com>
      Signed-off-by: NVille Syrjälä <ville.syrjala@linux.intel.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      3685a8f3
  10. 21 12月, 2012 1 次提交
  11. 29 11月, 2012 1 次提交
  12. 22 11月, 2012 3 次提交
  13. 20 11月, 2012 1 次提交
  14. 13 11月, 2012 1 次提交
  15. 26 10月, 2012 2 次提交
  16. 24 10月, 2012 1 次提交
    • D
      drm/i915: clear the entire sdvo infoframe buffer · b6e0e543
      Daniel Vetter 提交于
      Like in the case of native hdmi, which is fixed already in
      
      commit adf00b26
      Author: Paulo Zanoni <paulo.r.zanoni@intel.com>
      Date:   Tue Sep 25 13:23:34 2012 -0300
      
          drm/i915: make sure we write all the DIP data bytes
      
      we need to clear the entire sdvo buffer to avoid upsetting the
      display.
      
      Since infoframe buffer writing is now a bit more elaborate, extract it
      into it's own function. This will be useful if we ever get around to
      properly update the ELD for sdvo. Also #define proper names for the
      two buffer indexes with fixed usage.
      
      v2: Cite the right commit above, spotted by Paulo Zanoni.
      
      v3: I'm too stupid to paste the right commit.
      
      v4: Ben Hutchings noticed that I've failed to handle an underflow in
      my loop logic, breaking it for i >= length + 8. Since I've just lost C
      programmer license, use his solution. Also, make the frustrated 0-base
      buffer size a notch more clear.
      Reported-and-tested-by: NJürg Billeter <j@bitron.ch>
      Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=25732
      Cc: stable@vger.kernel.org
      Cc: Paulo Zanoni <przanoni@gmail.com>
      Cc: Ben Hutchings <ben@decadent.org.uk>
      Reviewed-by: NRodrigo Vivi <rodrigo.vivi@gmail.com>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b6e0e543
  17. 16 10月, 2012 2 次提交
  18. 03 10月, 2012 2 次提交
  19. 06 9月, 2012 8 次提交
    • D
      drm/i915: improve modeset state checking after dpms calls · b980514c
      Daniel Vetter 提交于
      Now that we have solid modeset state tracking and checking code in
      place, we can do the Full Monty also after dpms calls.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b980514c
    • D
      drm/i915: s/intel_encoder_disable/intel_encoder_noop · 1f703855
      Daniel Vetter 提交于
      Because that's what it is. Unfortunately we can't rip this out because
      the fb helper has an incetious relationship with the crtc helper - it
      likes to call disable_unused_functions, among other things.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      1f703855
    • D
      drm/i915: check connector hw/sw state · 0a91ca29
      Daniel Vetter 提交于
      Atm we can only check the connector state after a dpms call - while
      doing modeset with the copy&pasted crtc helper code things are too
      ill-defined for proper checking. But the idea is very much to call
      this check from the modeset code, too.
      
      v2: Fix dpms check and don't presume that if the hw isn't on that it
      must not be linked up with an encoder (it could simply be switched off
      with the dpms state).
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      0a91ca29
    • D
      drm/i915/sdvo: implement get_hw_state · 4ac41f47
      Daniel Vetter 提交于
      SDVO is the first real special case - we support multiple outputs on
      the same encoder and the encoder dpms state isn't the same as when
      just disabling the outputs when the encoder is cloned.
      
      Hence we need a real connector get_hw_state function which inquires
      the sdvo encoder about its active outputs.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      4ac41f47
    • D
      drm/i915: rip out encoder->prepare/commit · c9deac97
      Daniel Vetter 提交于
      With the new infrastructure we're doing this when enabling/disabling
      the entire display pipe.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      c9deac97
    • D
      drm/i915: copy&paste drm_crtc_helper_set_mode · a6778b3c
      Daniel Vetter 提交于
      Together with the static helper functions drm_crtc_prepare_encoders
      and drm_encoder_disable (which will be simplified in the next patch,
      but for now are 1:1 copies). Again, no changes beside new names for
      these functions.
      
      Also call our new set_mode instead of the crtc helper one now in all
      the places we've done so far.
      
      v2: Call the function just intel_set_mode to better differentia it
      from intel_crtc_mode_set which really only does the ->mode_set step of
      the entire modeset sequence on one crtc. Whereas this function does
      the global change.
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      a6778b3c
    • D
      drm/i915: convert dpms functions of dvo/sdvo/crt · b2cabb0e
      Daniel Vetter 提交于
      Yeah, big patch but I couldn't come up with a neat idea of how to
      split it up further, that wouldn't break dpms on cloned configs
      somehow. But the changes in dvo/sdvo/crt are all pretty much
      orthonogal, so it's not too bad a patch.
      
      These are the only encoders that support cloning, which requires a few
      special changes compared to the previous patches.
      - Compute the desired state of the display pipe by walking all
        connected encoders and checking whether any has active connectors.
        To make this clearer, drop the old mode parameter to the crtc dpms
        function and rename it to intel_crtc_update_dpms.
      - There's the curious case of intel_crtc->dpms_mode. With the previous
        patches to remove the overlay pipe A code and to rework the load
        detect pipe code, the big users are gone. We still keep it to avoid
        enabling the pipe twice, but we duplicate this logic with
        crtc->active, too. Still, leave this for now and just push a fake
        dpms mode into it that reflects the state of the display pipe.
      
      Changes in the encoder dpms functions:
      - We clamp the dpms state to the supported range right away. This is
        escpecially important for the VGA outputs, where only older hw
        supports the intermediate states. This (and the crt->adpa_reg patch)
        allows us to unify the crt dpms code again between all variants
        (gmch, vlv and pch).
      - We only enable/disable the output for dvo/sdvo and leave the encoder
        running. The encoder will be disabled/enabled when we switch the
        state of the entire output pipeline (which will happen right away
        for non-cloned setups). This way the duplication is reduced and
        strange interaction when disabling output ports at the wrong time
        avoided.
      
      The dpms code for all three types of connectors contains a bit of
      duplicated logic, but I think keeping these special cases separate is
      simpler: CRT is the only one that hanldes intermediate dpms state
      (which requires extra logic to enable/disable things in the right
      order), and introducing some abstraction just to share the code
      between dvo and sdvo smells like overkill. We can do that once someone
      bothers to implement cloning for the more modern outputs. But I doubt
      that this will ever happen.
      
      v2: s/crtc/crt/_set_dpms, noticed by Paulo Zanoni.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-Off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      b2cabb0e
    • D
      drm/i915/sdvo: convert to encoder disable/enable · ce22c320
      Daniel Vetter 提交于
      Similar to crt, this doesn't convert the dpms functions.
      Also similar to crt, we don't switch of the display pipe
      for the intermediate modes, only DPMS_OFF is truely off.
      Reviewed-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
      ce22c320