- 29 7月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Platform parameter to enable automatic FIFO configuration when the codec is in Mode1 or Mode7 FIFO mode. When this mode is selected, the controls for changing nSample (in Mode1), and UTHR (in Mode7) are not added. The driver configures the FIFO configuration based on the stream's period size in a way, that every burst will read period size of data from the host. In Mode7 we need to use a formula, which gives close enough aproximation for the burst length from the host point of view. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Replace the hardwired latency definition with platform data parameter, and simplify the nSample parameter calculation. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 07 6月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Upper threshold is used in mode7 of DAC33. Instead of hard wired UTHR, add control to change the upper threshold value. Changing upper threshold is not allowed when the playback is already running, since wrongly timed change in the UTHR can cause problems with the codec. With this control the length of the burst in mode7 can be changed. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 18 5月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Avoid calling the dac33_hard_power when the codec was already in BIAS_OFF state. This could happen in device suspend and module removal time. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Felipe Balbi 提交于
Since the cases when the same power state would be set again handled gracefully, we do not need to use dev_warn. Signed-off-by: NFelipe Balbi <felipe.balbi@nokia.com> Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 10 5月, 2010 1 次提交
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由 Mark Brown 提交于
The core will ensure that the device is in either STANDBY or OFF bias before suspending, restoring the bias in the driver is unneeded. Some drivers doing slightly more roundabout things have been left alone for now. Tested-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 06 5月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Do not change the codec defaults for the following registers: 0x40, 0x41: Line output gains, do not use amplification 0x42: LOM/LOP Voltage hold, and selection 0x44: LOM inversion control It has been found, that the values configured to these registers can cause amplification, which can make the output of DAC33 distorted. The codec reset values are considered safe in all environmnts. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 03 5月, 2010 4 次提交
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由 Peter Ujfalusi 提交于
Let the codec to hit OFF instead of STANDBY, when there is no activity. When the codec is off, than the associated regulator can be also turned off (if the number of users on the regulator is 0). After initialization, the codec remains in power off, it is only turned on for reading the ID registers (also testing the regulators). The codec power is enabled, when the codec is moving from BIAS_OFF to BIAS_STANDBY. The codec is turned off, when it hits BIAS_OFF. There are few scenarios, which has to be taken care:: 1. Analog bypass caused BIAS_OFF -> BIAS_ON We need to power on the codec, and do the chip init, but we does not need to execute the playback related configuration 2. Playback caused BIAS_OFF -> BIAS_ON We need to power on the codec, and do the chip init, and also we need to execute the playback related configuration. 3. Playback start, while Analog bypass is on (BIAS_ON -> BIAS_ON) We need to execute the playback related configuration. The codec is already on. 4. Analog bypass enable, while playback (BIAS_ON -> BIAS_ON) Nothing need to be done. 5. Playback start withing soc power down timeout (BIAS_ON -> BIAS_ON) We need to execute the playback related configuration. The codec is still on. Since the power up, and the codec init is optimized, the added overhead in stream start is minimal. Withing this patch, the hard_power function is now only doing what it supposed to: only handle the powers, and GPIO reset line. The codec initialization and state restore has been moved out. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
As a preparation for supporting codec to be turned off, when we are in BIAS_STANDBY. The substream must be easily available in other places than pcm_* callbacks. Manage a pointer in _startup, and _shutdown for this. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Optimize the way how tlv320dac33 is powered uppon module and soc initialization. Also read the DAC33 ID registers, and update the reg_cache to reflect it. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
On power up we only need to initialize the codec, and restore only registers, which are not in either in DAPM nor in the playback start sequence. These are mostly gain related registers. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 28 4月, 2010 1 次提交
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由 Liam Girdwood 提交于
Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 26 4月, 2010 5 次提交
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由 Peter Ujfalusi 提交于
Delay reporting for the three implemented DAC33 FIFO modes. DAC33 has FIFO depth status register(s), but it can not be used, since inside of pcm_pointer we can not send I2C commands. Timestamp based estimation need to be used. The method of calculating the delay depends on the active FIFO mode. Bypass mode: FIFO is bypassed, report 0 as delay Mode1: nSample fill mode. In this mode I need to use two timestamp ts1: taken when the interrupt has been received ts2: taken before writing to nSample register. Interrupts are coming when DAC33 FIFO depth goes under alarm threshold. Phase1: when we received the alarm threshold, but our workqueue has not been executed (safeguard phase). Just count the played out samples since ts1 and subtract it from the alarm threshold value. Phase2: During nSample burst (after writing to nSample register), count the played out samples since ts1, count the samples received since ts2 (in a burst). Estimate the FIFO depth using these and alarm threshold value. Phase3: Draining phase (after the burst read), count the played out samples since ts1. Estimate the FIFO depth using the nSample configuration and the alarm threshold value. Mode7: Threshold based fill mode. In this mode one timestamp is enough. ts1: taken when the interrupt has been received Interrupts are coming when DAC33 FIFO depth reaches upper threshold. Phase1: Draining phase (after the burst), counting the played out samples since ts1, and subtract it from the upper threshold value. Phase2: During burst operation. Using the pre calculated time needed to play out samples from the buffer during the drain period (from upper to lower threshold), move the time window to cover the estimated time from the burst start to the current time. Calculate the samples played out since lower threshold and also the samples received during the same time. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
When the DAC33 FIFO is in use the dai interface is running in much higher speed than the sampling frequency. Calculate the rate based on the internal base frequency and the bclk divider. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Upper and Lower threshold values are used as magic numbers. Replace them with defines for later use. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
There is no need for calculations for FIFO bypass mode. Just in case set the nsample maximum limit, which has been done in the calculation phase. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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由 Peter Ujfalusi 提交于
Alarm threshold interrupt is triggered right after the playback start. This interrupt is recieved during the first burst period, and caused the state machine to write additional nSample command, which has to be avoided. To fix this issue move the DAC33 interrupt unmasking after we configured the PREFILL register with a small delay. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Signed-off-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 17 4月, 2010 1 次提交
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由 Mark Brown 提交于
One of the features of the multi CODEC work is that it embeds a struct device in the CODEC to provide diagnostics via a sysfs class rather than via the device tree, at which point it's much better to use the struct device private data rather than having two places to store it. Provide an accessor function to allow this change to be made more easily, and update all the CODEC drivers are updated. To ensure use of the accessor the private data structure member is renamed, meaning that if code developed with older an older core that still uses private_data is merged it will fail to build. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
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- 30 3月, 2010 1 次提交
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由 Tejun Heo 提交于
include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: NTejun Heo <tj@kernel.org> Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
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- 19 3月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
During validation of the internal clocking setup it has been found that the following settings were not configured in an optimal way: ASRC_CTRL_A: SRCLKDIV was incorrect, instad of divide ratio 3, ratio of 2 has to be used (as the comment stated) DAC_CTRL_A: Fs = Fsref is the desired configuration instead of Fs = Fsref / 1.5 Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
To make DSP_A mode working correctly the data delay should be configured to 0. DSP_B mode thus can not be used with DAC33, so remove it. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 3月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Platform data option for the codec to keep the BCLK clock continuously running in FIFO modes (codec master). OMAP3 McBSP when in slave mode needs continuous BCLK running on the serial bus in order to operate correctly. Since in FIFO mode the DAC33 can also shut down the BCLK clock and enable it only when it is needed, let the platforms decide if the CPU side needs the BCLK running or not. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
To avoid race condition especially in FIFO modes the sequence for enabling and disabling the codec need to be changed. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 17 2月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
OSCSET calculation was not correct in case of 44.1KHz sampling rate. With small adjustment both 48 and 44.1 KHz calculation now gives the correct value. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
In repeated playback the FIFOFLUSH bit remained set, and never has been cleared. Clear it during the setup phase. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 20 1月, 2010 2 次提交
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由 Peter Ujfalusi 提交于
Add possibility to configure the burst mode BCLK divider through platform data structure. The BCLK divider changes the actual speed of the serial bus in burst mode, which is faster than the sampling frequency of the running stream. In this way platforms can experiment with the optimal burst speed without the need to modify the codec driver itself. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
The BCLK divider was not configured in case of mode7. This leads to unpredictable behavior when switching between FIFO modes. Configure the BCLK divider depending on the fifo_mode (FIFO is in use, or FIFO bypass). Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 19 1月, 2010 1 次提交
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由 Peter Ujfalusi 提交于
Set the prefill number of samples as the same as the lower threshold in mode7. In this way the codec will read the same amount of data on startup and during the running playback. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 12 1月, 2010 1 次提交
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由 Mark Brown 提交于
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 31 12月, 2009 5 次提交
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由 Peter Ujfalusi 提交于
The currently available FIFO modes (mode1 and mode7) require master mode from the codec. Do not allow the slave configuration when the FIFO is in use. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
Mode 7 of tlv320dac33 operates in the following way: The codec is in master mode. Host configures upper and lower thresholds in tlv320dac33 During playback the codec will clock in the data until the upper threshold is reached in FIFO. At this point the codec stops the colocks on the serial bus. When the FIFO fill is reaching the lower threshold limit the codec will enable the clocks on the serial bus, and clocks in data till the upper threshold is reached. In this mode, we can also request interrupts for threshold events (upper, lower and alarm), which could be used for power management. At this point the interrupts are not enabled for this mode, but it can be taken into use in the future, when the surrounding code makes it possible to use it. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.oc.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
Use switch instead of if statements to configure FIFO bypass and mode1. With this change adding new FIFO mode is going to be easier, and cleaner. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
Ensure that the code is going to be readable, when new FIFO modes are introduced later. Move the prefill and playback state handling to inlined functions. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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由 Peter Ujfalusi 提交于
In order to have support for more FIFO modes supported by tlv320dac33, the switch for enabling/disabling the FIFO use has to be replaced with an enum. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 04 12月, 2009 1 次提交
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由 Ilkka Koskinen 提交于
Take the regulator framework in use for managing the power sources. Signed-off-by: NIlkka Koskinen <ilkka.koskinen@nokia.com> Acked-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 26 11月, 2009 1 次提交
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由 Peter Ujfalusi 提交于
RT workqueue is going away in the near future, replace it with singlethread wq for now, which is still supported. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 13 11月, 2009 1 次提交
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由 Mark Brown 提交于
The DAPM widgets are now insntantiated by the core when creating the card so there is no need for the individual CODEC drivers to do so. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 04 11月, 2009 1 次提交
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由 Mark Brown 提交于
snd_soc_init_card() is always called as the last part of the CODEC probe function so we can factor it out into the core card setup rather than have each CODEC replicate the code to do the initialiastation. This will be required to support multiple CODECs per card. Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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- 15 10月, 2009 1 次提交
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由 Peter Ujfalusi 提交于
Driver for Texas Instruments TLV320DAC33 (SLAS546) low power stereo audio DAC. TLV320DAC33 is a stereo audio codec with integrated 24KB FIFO for low power audio playback. The digital interface can use I2S, DSP (A or B), Right and Left justified formats. DAC33 has stereo analog input, which can be bypassed to the analog outputs. Regarding to the internal 24KB FIFO the driver implements 'FIFO bypass' mode (default) and nSample mode (FIFO is in use). a) In 'FIFO bypass' mode the internal FIFO is not in use, the codec is working synchronously as a normal codec (it needs constant stream of data on the digital interface). b) The nSample mode implementation uses one interrupt line from DAC33 to the host: Alarm threshold is set to 10ms of audio data (limit by the driver implementation). DAC33 will signal an interrupt, when the FIFO level goes under the Alarm threshold. The host will write to nSample register a value (number of stereo samples), to tell DAC33 how many samples it should read in a burst from the host. When the DAC33 received the number of samples, it disables the clocks on the I2S bus. When the FIFO use again goes under the Alarm threshold, DAC33 signals the host with an interrupt, and the process is repeated. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@nokia.com> Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
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