- 03 10月, 2016 6 次提交
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由 Wei Hu (Xavier) 提交于
In hip06, there's no interface to release hem memory. So, hardware can't identify whether hem memory released or not. If all context in a hem memory released, the related hem memory will be released by driver and reused by others. But, hardware don't know that this memory can't be used already. In order to fix this bug, hns roce driver reserved 128K memory for each type of hem(QPC/CQC/MTPT). While unmap hem memory, hns roce driver will write base address of reserved memory according to hem type. Signed-off-by: NWei Hu (Xavier) <xavier.huwei@huawei.com> Signed-off-by: NDongdong Huang(Donald) <hdd.huang@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Lijun Ou 提交于
The parameter named collapsed unused in hns_roce_cq_alloc. Also, parameter named doorbell_lock unsed in hns_roce_v1_cq_set_ci. This patch optimize these parameters. Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Lijun Ou 提交于
This patch mainly modify the value of HNS_ROCE_SL_SHIFT and delete the lines for assigning for the field of local_enable_e2e_credit in QP1C. Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Lijun Ou 提交于
Fix bug of modify qp from init to init on user mode. Otherwise, it will oops when rmda cm established. Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Lijun Ou 提交于
This patch mainly adds phy_port to HNS RoCE QP. This shall be used in calculating the GSI QPN for the port. Initally when RDMA is being established, all IB ports share a QPN which later needs to be re-assigned to a particular GSI/QPN and which is per-port. This also fixes a bug in base driver where iboe port was being used instead of phy_port at some places. This values might not be same always. Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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由 Lijun Ou 提交于
Fix the length of wqe that maybe lead to an error and write the end bytes of QP1C into the register. Signed-off-by: NLijun Ou <oulijun@huawei.com> Reviewed-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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- 25 8月, 2016 1 次提交
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由 Salil 提交于
This patch is meant to add support of ACPI to the Hisilicon RoCE driver. Changes done are primarily meant to detect the type and then either use DT specific or ACPI spcific functions. Where ever possible, this patch tries to make use of Unified Device Property Interface APIs to support both DT and ACPI through single interface. This patch depends upon HNS ethernet driver to Reset RoCE. This function within HNS ethernet driver has also been enhanced to support ACPI and is part of other accompanying patch with this patch-set. NOTE: The changes in this patch are done over below branch, https://github.com/dledford/linux/tree/hns-roceSigned-off-by: NSalil Mehta <salil.mehta@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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- 23 8月, 2016 1 次提交
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由 oulijun 提交于
These are the various new source code files for the Hisilicon RoCE driver for ARM architecture. Signed-off-by: NWei Hu <xavier.huwei@huawei.com> Signed-off-by: NNenglong Zhao <zhaonenglong@hisilicon.com> Signed-off-by: NLijun Ou <oulijun@huawei.com> Signed-off-by: NDoug Ledford <dledford@redhat.com>
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