1. 22 2月, 2011 1 次提交
  2. 05 10月, 2010 1 次提交
    • R
      ARM: Allow SMP kernels to boot on UP systems · f00ec48f
      Russell King 提交于
      UP systems do not implement all the instructions that SMP systems have,
      so in order to boot a SMP kernel on a UP system, we need to rewrite
      parts of the kernel.
      
      Do this using an 'alternatives' scheme, where the kernel code and data
      is modified prior to initialization to replace the SMP instructions,
      thereby rendering the problematical code ineffectual.  We use the linker
      to generate a list of 32-bit word locations and their replacement values,
      and run through these replacements when we detect a UP system.
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      f00ec48f
  3. 19 9月, 2010 2 次提交
  4. 11 8月, 2010 1 次提交
  5. 08 5月, 2010 1 次提交
  6. 21 2月, 2010 1 次提交
    • R
      MM: Pass a PTE pointer to update_mmu_cache() rather than the PTE itself · 4b3073e1
      Russell King 提交于
      On VIVT ARM, when we have multiple shared mappings of the same file
      in the same MM, we need to ensure that we have coherency across all
      copies.  We do this via make_coherent() by making the pages
      uncacheable.
      
      This used to work fine, until we allowed highmem with highpte - we
      now have a page table which is mapped as required, and is not available
      for modification via update_mmu_cache().
      
      Ralf Beache suggested getting rid of the PTE value passed to
      update_mmu_cache():
      
        On MIPS update_mmu_cache() calls __update_tlb() which walks pagetables
        to construct a pointer to the pte again.  Passing a pte_t * is much
        more elegant.  Maybe we might even replace the pte argument with the
        pte_t?
      
      Ben Herrenschmidt would also like the pte pointer for PowerPC:
      
        Passing the ptep in there is exactly what I want.  I want that
        -instead- of the PTE value, because I have issue on some ppc cases,
        for I$/D$ coherency, where set_pte_at() may decide to mask out the
        _PAGE_EXEC.
      
      So, pass in the mapped page table pointer into update_mmu_cache(), and
      remove the PTE value, updating all implementations and call sites to
      suit.
      
      Includes a fix from Stephen Rothwell:
      
        sparc: fix fallout from update_mmu_cache API change
      Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
      Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      4b3073e1
  7. 15 10月, 2009 1 次提交
    • S
      ARM: 5763/1: ARM: SMP: Fix the BUG with CONFIG_PREEMPT enabled · daaeb6c9
      Santosh Shilimkar 提交于
      This patch fixes the BUG: using smp_processor_id() in preemptible
      Below is the stripped backtrace.
      
      BUG: using smp_processor_id() in preemptible [00000000] code: init/1
      caller is flush_tlb_mm+0x44/0x70
      Backtrace:
      [<c00225c4>] (dump_backtrace+0x0/0x110) from [<c01713a0>] (dump_stack+0x18/0x1c)
       r7:00000000 r6:c00234f0 r5:00000001 r4:c7828000
      [<c0171388>] (dump_stack+0x0/0x1c) from [<c0135364>] (debug_smp_processor_id+0xc0/0xf0)
      [<c01352a4>] (debug_smp_processor_id+0x0/0xf0) from [<c00234f0>] (flush_tlb_mm+0x44/0x70)
       r7:00000000 r6:c60b41a0 r5:c60b4154 r4:00000001
      [<c00234ac>] (flush_tlb_mm+0x0/0x70) from [<c0039568>] (dup_mm+0x304/0x38c)
       r5:c1f09058 r4:00000000
      [<c0039264>] (dup_mm+0x0/0x38c) from [<c0039de4>] (copy_process+0x7b8/0xeb0)
      [<c003962c>] (copy_process+0x0/0xeb0) from [<c003a638>] (do_fork+0x15c/0x29c)
      [<c003a4dc>] (do_fork+0x0/0x29c) from [<c0021df0>] (sys_clone+0x34/0x3c)
      [<c0021dbc>] (sys_clone+0x0/0x3c) from [<c001efa0>] (ret_fast_syscall+0x0/0x2c)
      Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      daaeb6c9
  8. 24 9月, 2009 1 次提交
  9. 30 5月, 2009 1 次提交
  10. 25 3月, 2009 2 次提交
  11. 13 8月, 2008 1 次提交
  12. 03 8月, 2008 1 次提交
  13. 23 6月, 2008 1 次提交
    • L
      [ARM] Feroceon: L2 cache support · 99c6dc11
      Lennert Buytenhek 提交于
      This patch adds support for the unified Feroceon L2 cache controller
      as found in e.g. the Marvell Kirkwood and Marvell Discovery Duo
      families of ARM SoCs.
      
      Note that:
      
      - Page table walks are outer uncacheable on Kirkwood and Discovery
        Duo, since the ARMv5 spec provides no way to indicate outer
        cacheability of page table walks (specifying it in TTBR[4:3] is
        an ARMv6+ feature).
      
        This requires adding L2 cache clean instructions to
        proc-feroceon.S (dcache_clean_area(), set_pte()) as well as to
        tlbflush.h ({flush,clean}_pmd_entry()).  The latter case is handled
        by defining a new TLB type (TLB_FEROCEON) which is almost identical
        to the v4wbi one but provides a TLB_L2CLEAN_FR flag.
      
      - The Feroceon L2 cache controller supports L2 range (i.e. 'clean L2
        range by MVA' and 'invalidate L2 range by MVA') operations, and this
        patch uses those range operations for all Linux outer cache
        operations, as they are faster than the regular per-line operations.
      
        L2 range operations are not interruptible on this hardware, which
        avoids potential livelock issues, but can be bad for interrupt
        latency, so there is a compile-time tunable (MAX_RANGE_SIZE) which
        allows you to select the maximum range size to operate on at once.
        (Valid range is between one cache line and one 4KiB page, and must
        be a multiple of the line size.)
      Signed-off-by: NLennert Buytenhek <buytenh@marvell.com>
      99c6dc11
  14. 20 10月, 2007 1 次提交
  15. 30 5月, 2007 1 次提交
  16. 22 5月, 2007 1 次提交
    • A
      Detach sched.h from mm.h · e8edc6e0
      Alexey Dobriyan 提交于
      First thing mm.h does is including sched.h solely for can_do_mlock() inline
      function which has "current" dereference inside. By dealing with can_do_mlock()
      mm.h can be detached from sched.h which is good. See below, why.
      
      This patch
      a) removes unconditional inclusion of sched.h from mm.h
      b) makes can_do_mlock() normal function in mm/mlock.c
      c) exports can_do_mlock() to not break compilation
      d) adds sched.h inclusions back to files that were getting it indirectly.
      e) adds less bloated headers to some files (asm/signal.h, jiffies.h) that were
         getting them indirectly
      
      Net result is:
      a) mm.h users would get less code to open, read, preprocess, parse, ... if
         they don't need sched.h
      b) sched.h stops being dependency for significant number of files:
         on x86_64 allmodconfig touching sched.h results in recompile of 4083 files,
         after patch it's only 3744 (-8.3%).
      
      Cross-compile tested on
      
      	all arm defconfigs, all mips defconfigs, all powerpc defconfigs,
      	alpha alpha-up
      	arm
      	i386 i386-up i386-defconfig i386-allnoconfig
      	ia64 ia64-up
      	m68k
      	mips
      	parisc parisc-up
      	powerpc powerpc-up
      	s390 s390-up
      	sparc sparc-up
      	sparc64 sparc64-up
      	um-x86_64
      	x86_64 x86_64-up x86_64-defconfig x86_64-allnoconfig
      
      as well as my two usual configs.
      Signed-off-by: NAlexey Dobriyan <adobriyan@gmail.com>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      e8edc6e0
  17. 08 2月, 2007 1 次提交
  18. 20 9月, 2006 1 次提交
    • D
      [ARM] 3759/2: Remove uses of %? · 6a39dd62
      Daniel Jacobowitz 提交于
      Patch from Daniel Jacobowitz
      
      The ARM kernel has several uses of asm("foo%?").  %? is a GCC internal
      modifier used to output conditional execution predicates.  However, no
      version of GCC supports conditionalizing asm statements.  GCC 4.2 will
      correctly expand %? to the empty string in user asms.  Earlier versions may
      reuse the condition from the previous instruction.  In 'if (foo) asm
      ("bar%?");' this is somewhat likely to be right... but not reliable.
      
      So, the only safe thing to do is to remove the uses of %?.  I believe
      the tlbflush.h occurances were supposed to be removed before, based
      on the comment about %? not working at the top of that file.
      
      Old versions of GCC could omit branches around user asms if the asm didn't
      mark the condition codes as clobbered.  This problem hasn't been seen on any
      recent (3.x or 4.x) GCC, but it could theoretically happen.  So, where
      %? was removed a cc clobber was added.
      Signed-off-by: NDaniel Jacobowitz <dan@codesourcery.com>
      Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
      6a39dd62
  19. 26 4月, 2006 1 次提交
  20. 22 3月, 2006 2 次提交
  21. 07 3月, 2006 1 次提交
  22. 17 4月, 2005 1 次提交
    • L
      Linux-2.6.12-rc2 · 1da177e4
      Linus Torvalds 提交于
      Initial git repository build. I'm not bothering with the full history,
      even though we have it. We can create a separate "historical" git
      archive of that later if we want to, and in the meantime it's about
      3.2GB when imported into git - space that would just make the early
      git days unnecessarily complicated, when we don't have a lot of good
      infrastructure for it.
      
      Let it rip!
      1da177e4