1. 11 11月, 2015 3 次提交
    • A
      MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime() · a7f4df4e
      Alex Smith 提交于
      Add user-mode implementations of gettimeofday() and clock_gettime() to
      the VDSO. This is currently usable with 2 clocksources: the CP0 count
      register, which is accessible to user-mode via RDHWR on R2 and later
      cores, or the MIPS Global Interrupt Controller (GIC) timer, which
      provides a "user-mode visible" section containing a mirror of its
      counter registers. This section must be mapped into user memory, which
      is done below the VDSO data page.
      
      When a supported clocksource is not in use, the VDSO functions will
      return -ENOSYS, which causes libc to fall back on the standard syscall
      path.
      
      When support for neither of these clocksources is compiled into the
      kernel at all, the VDSO still provides clock_gettime(), as the coarse
      realtime/monotonic clocks can still be implemented. However,
      gettimeofday() is not provided in this case as nothing can be done
      without a suitable clocksource. This causes the symbol lookup to fail
      in libc and it will then always use the standard syscall path.
      
      This patch includes a workaround for a bug in QEMU which results in
      RDHWR on the CP0 count register always returning a constant (incorrect)
      value. A fix for this has been submitted, and the workaround can be
      removed after the fix has been in stable releases for a reasonable
      amount of time.
      
      A simple performance test which calls gettimeofday() 1000 times in a
      loop and calculates the average execution time gives the following
      results on a Malta + I6400 (running at 20MHz):
      
       - Syscall:    ~31000 ns
       - VDSO (GIC): ~15000 ns
       - VDSO (CP0): ~9500 ns
      
      [markos.chandras@imgtec.com:
      - Minor code re-arrangements in order for mappings to be made
      in the order they appear to the process' address space.
      - Move do_{monotonic, realtime} outside of the MIPS_CLOCK_VSYSCALL ifdef
      - Use gic_get_usm_range so we can do the GIC mapping in the
      arch/mips/kernel/vdso instead of the GIC irqchip driver]
      Signed-off-by: NAlex Smith <alex.smith@imgtec.com>
      Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-mips@linux-mips.org
      Patchwork: https://patchwork.linux-mips.org/patch/11338/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      a7f4df4e
    • P
      MIPS: Malta: Register UP SMP ops if all else fails · ecafe3e9
      Paul Burton 提交于
      If we fail to register any real SMP implementations, fall back to
      registering the dummy UP implementation. Otherwise when we build an SMP
      kernel & run it on a system where the SMP implementations fail to probe
      (eg. QEMU) the kernel will perform a NULL dereference attempting to call
      mp_ops->smp_setup() from plat_smp_setup().
      
      Notably this fixes booting kernels with CPS SMP enabled on QEMU, which
      doesn't currently implement the CM, CPC or GIC.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: Peter Hurley <peter@hurleysoftware.com>
      Cc: Rob Herring <robh@kernel.org>
      Cc: linux-kernel@vger.kernel.org
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Patchwork: https://patchwork.linux-mips.org/patch/11223/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      ecafe3e9
    • P
      MIPS: Malta: Setup RAM regions via DT · e81a8c7d
      Paul Burton 提交于
      Move memory configuration to be performed via device tree for the Malta
      board. This moves more Malta specific code to malta-dtshim.c, leaving
      the rest of the mti-malta code a little more board-agnostic. This will
      be useful to share more code between boards, with the device tree
      providing the board specifics as intended.
      
      Since we can't rely upon Malta boards running a bootloader capable of
      handling devictrees & filling in the required information, a piece of
      shim code (malta_dt_shim) is added to consume the (e)memsize variables
      provided as part of the bootloader environment (or on the kernel command
      line) then generate the DT memory node using the provided values.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: devicetree@vger.kernel.org
      Cc: Kumar Gala <galak@codeaurora.org>
      Cc: linux-kernel@vger.kernel.org
      Cc: Ian Campbell <ijc+devicetree@hellion.org.uk>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: James Hogan <james.hogan@imgtec.com>
      Cc: Pawel Moll <pawel.moll@arm.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: Mark Rutland <mark.rutland@arm.com>
      Patchwork: https://patchwork.linux-mips.org/patch/11222/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      e81a8c7d
  2. 26 10月, 2015 2 次提交
    • P
      MIPS: Allow 24Hz timer frequency · 67596573
      Paul Burton 提交于
      A boundary exists beyond which the timer frequency becomes high enough
      that timer interrupts saturate the system and either cause it to slow to
      a crawl or stop functioning entirely. Where that boundary lies depends
      upon a number of factors such as the overhead of each interrupt and the
      overall speed of the CPU, but correlates strongly with the clock
      frequency at which the CPU runs. When running on emulators during
      bringup or debug of a CPU that clock frequency is very low, which
      results in the boundary at which the timer frequency becomes
      unsustainable being very low. The current minimum of 48Hz pushes against
      boundary in certain situations in current systems. Allow the kernel to
      be configured for a 24Hz timer frequency in order to avoid problems on
      such slow running systems.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: linux-mips@linux-mips.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/11184/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      67596573
    • R
      MIPS: Use ARCH_USE_BUILTIN_BSWAP. · 1ee3630a
      Ralf Baechle 提交于
      ARCH_USE_BUILTIN_BSWAP will use __builtin_bswap16(), __builtin_bswap32()
      and __builtin_bswap64() where available.  This allows better instruction
      scheduling.  On pre-R2 processors it will result in 32 bit and 64 bit
      swapping being performed in a call to a __bswapsi2() rsp. __bswapdi2()
      functions, so we add these, too.
      
      For a 4.2 kernel with GCC 4.9 this yields the following kernel sizes:
      
         text    data     bss     dec     hex filename
      3996071  155804   88992 4240867  40b5e3 vmlinux         ip22 baseline
      3985687  159900   88992 4234579  409d53 vmlinux         ip22 + bswap patch
      6913157  378552  251024 7542733  7317cd vmlinux         ip27 baseline
      6878581  378552  251024 7508157  7290bd vmlinux         ip27 + bswap patch
      5773777  268752  187424 6229953  5f0fc1 vmlinux         malta baseline
      5773401  268752  187424 6229577  5f0e49 vmlinux         malta + bswap patch
      
      Presumably the code size improvments yield better cache hit rate thus
      better performance compensating for the extra function call but this
      will still need to be benchmarked.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      1ee3630a
  3. 11 9月, 2015 1 次提交
    • D
      kexec: split kexec_load syscall from kexec core code · 2965faa5
      Dave Young 提交于
      There are two kexec load syscalls, kexec_load another and kexec_file_load.
       kexec_file_load has been splited as kernel/kexec_file.c.  In this patch I
      split kexec_load syscall code to kernel/kexec.c.
      
      And add a new kconfig option KEXEC_CORE, so we can disable kexec_load and
      use kexec_file_load only, or vice verse.
      
      The original requirement is from Ted Ts'o, he want kexec kernel signature
      being checked with CONFIG_KEXEC_VERIFY_SIG enabled.  But kexec-tools use
      kexec_load syscall can bypass the checking.
      
      Vivek Goyal proposed to create a common kconfig option so user can compile
      in only one syscall for loading kexec kernel.  KEXEC/KEXEC_FILE selects
      KEXEC_CORE so that old config files still work.
      
      Because there's general code need CONFIG_KEXEC_CORE, so I updated all the
      architecture Kconfig with a new option KEXEC_CORE, and let KEXEC selects
      KEXEC_CORE in arch Kconfig.  Also updated general kernel code with to
      kexec_load syscall.
      
      [akpm@linux-foundation.org: coding-style fixes]
      Signed-off-by: NDave Young <dyoung@redhat.com>
      Cc: Eric W. Biederman <ebiederm@xmission.com>
      Cc: Vivek Goyal <vgoyal@redhat.com>
      Cc: Petr Tesarik <ptesarik@suse.cz>
      Cc: Theodore Ts'o <tytso@mit.edu>
      Cc: Josh Boyer <jwboyer@fedoraproject.org>
      Cc: David Howells <dhowells@redhat.com>
      Cc: Geert Uytterhoeven <geert@linux-m68k.org>
      Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
      Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
      2965faa5
  4. 03 9月, 2015 9 次提交
  5. 26 8月, 2015 1 次提交
  6. 04 8月, 2015 1 次提交
  7. 03 8月, 2015 1 次提交
  8. 01 8月, 2015 1 次提交
  9. 15 7月, 2015 1 次提交
    • R
      MIPS: SB1: Remove support for Pass 1 parts. · dd0bc75e
      Ralf Baechle 提交于
      Pass 1 parts had a number of significant erratas and were only available
      in small numbers and under NDA.  Full support also required the use of a
      special toolchain that kept branches properly aligned.  These workarounds
      were never upstreamed and the only toolchain known to have them is
      Montavista's GCC 3.0-based toolchain which completly obsoleted if not
      useless these days.
      
      So now that automated testing has tripped over the user of the
      -msb1-pass1-workarounds option, rather than fixing it remove support for
      pass 1 parts.
      
      Probably nobody will notice.  I seem to own the last know pass 1 board
      and I haven't noticed another one in the wild in the past decade, at
      least.
      Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      dd0bc75e
  10. 14 7月, 2015 1 次提交
    • P
      MIPS: Require O32 FP64 support for MIPS64 with O32 compat · 4e9d324d
      Paul Burton 提交于
      MIPS32r6 code requires FP64 (ie. FR=1) support. Building a kernel with
      support for MIPS32r6 binaries but without support for O32 with FP64 is
      therefore a problem which can lead to incorrectly executed userland.
      
      CONFIG_MIPS_O32_FP64_SUPPORT is already selected when the kernel is
      configured for MIPS32r6, but not when the kernel is configured for
      MIPS64r6 with O32 compat support. Select CONFIG_MIPS_O32_FP64_SUPPORT in
      such configurations to prevent building kernels which execute MIPS32r6
      userland incorrectly.
      Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
      Cc: Markos Chandras <markos.chandras@imgtec.com>
      Cc: <stable@vger.kernel.org> # v4.0-
      Cc: linux-mips@linux-mips.org
      Cc: Matthew Fortune <matthew.fortune@imgtec.com>
      Cc: stable@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Patchwork: https://patchwork.linux-mips.org/patch/10674/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
      4e9d324d
  11. 09 7月, 2015 1 次提交
  12. 22 6月, 2015 18 次提交