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- 07 1月, 2012 1 次提交
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由 Myron Stowe 提交于
The 'latency timer' of PCI devices, both Type 0 and Type 1, is setup in architecture-specific code [see: 'pcibios_set_master()']. There are two approaches being taken by all the architectures - check if the 'latency timer' is currently set between 16 and 255 and if not bring it within bounds, or, do nothing (and then there is the gratuitously different PA-RISC implementation). There is nothing architecture-specific about PCI's 'latency timer' so this patch pulls its setup functionality up into the PCI core by creating a generic 'pcibios_set_master()' function using the '__weak' attribute which can be used by all architectures as a default which, if necessary, can then be over-ridden by architecture-specific code. No functional change. Signed-off-by: NMyron Stowe <myron.stowe@redhat.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 01 11月, 2011 1 次提交
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由 Paul Gortmaker 提交于
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 01 11月, 2010 1 次提交
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由 Paul Mundt 提交于
This takes a bit of a sledgehammer to the machvec I/O routines. The iomem case requires no special casing and so can just be dropped outright. This only leaves the ioport casing for PCI and SuperIO mangling. With the SuperIO case going through the standard ioport mapping, it's possible to replace everything with generic routines. With this done the standard I/O routines are tidied up and NO_IOPORT now gets default-enabled for the vast majority of boards. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 14 10月, 2010 1 次提交
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由 Paul Mundt 提交于
SDK7786 supports connecting either slot3 or 4 to the same PCIe port by way of FPGA muxing. By default the vertical slot 3 on the baseboard is enabled, so this adds in a command line option for forcibly enabling the slot 4 edge connector. If nothing has been specified on the command line, we fall back to reading the resistor values for card presence to figure out where to route the port to. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 20 9月, 2010 1 次提交
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由 Paul Mundt 提交于
This copies the pci_config_lock idea from x86 over, allowing us to kill off a couple of existing private locks. At the same time, these need to be converted to raw spinlocks for -rt kernels, so we make that change at the same time. This should make it easier for future parts to get the locking right instead of inevitable ending up with lock type mismatches. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 19 9月, 2010 1 次提交
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 07 6月, 2010 1 次提交
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由 Paul Mundt 提交于
pcibios_fixup_device_resources() presently skips over resources flagged with IORESOURCE_PCI_FIXED, which is a remnant of the old PCI-auto code. The only user for this at present is the Dreamast GAPSPCI code which can't tolerate any adjustments to the BARs, but a combination of the IORESOURCE_PCI_FIXED and zeroed out hose offsets does the right thing for this case already, so we simply kill off the special casing. Reported-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 23 2月, 2010 2 次提交
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由 Dominik Brodowski 提交于
Now that we return the new resource start position, there is no need to update "struct resource" inside the align function. Therefore, mark the struct resource as const. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Dominik Brodowski 提交于
As suggested by Linus, align functions should return the start of a resource, not void. An update of "res->start" is no longer necessary. Cc: Bjorn Helgaas <bjorn.helgaas@hp.com> Cc: Yinghai Lu <yhlu.kernel@gmail.com> Signed-off-by: NDominik Brodowski <linux@dominikbrodowski.net> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 03 2月, 2010 1 次提交
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由 Paul Mundt 提交于
This adds support for handling early PERR/SERR triggering in between controller registration and the initial bus scan. Buggy cards end up asserting these as soon as the M66EN scan is undertaken, resulting in an early crash. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 01 2月, 2010 4 次提交
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由 Paul Mundt 提交于
The SH7780 PCI controller supports 3 different ranges of PCI memory in addition to its PCI I/O window. In the case of 29-bit mode, only 2 memory windows are supported, while in 32-bit mode all 3 are visible. This attempts to make the resource handling completely dynamic and to permit platforms to map in as many apertures as they can handle. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
These were never handled before, so implement some common infrastructure to support them, then make use of that in the SH7780-specific code. In practice there is little here that can not be generalized for SH4 parts, which will be an incremental change as the 7780/7751 code is gradually unified. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
register_pci_controller() can fail, but presently is a void function. Change this over to an int so that we can bail early before continuing on with post-registration initialization (such as throwing the controller in to 66MHz mode in the case of the SH7780 host controller). Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This adds some helper glue for scanning the bus and determining if all of the devices are 66MHz capable or not before flipping on 66MHz mode. This isn't quite to spec, but it's fairly consistent with what other embedded controllers end up having to do. Scanning code cribbed from the MIPS txx9 PCI code. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 29 1月, 2010 2 次提交
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由 Paul Mundt 提交于
Newer SH parts are now commonly shipping with multiple controllers, so we wire up PCI domain support to deal with them. Shamelessly cloned from the MIPS implementation. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Presently we just call in to request_resource() for the ioport and iomem resources without checking for errors. This has already hidden a couple of bugs, so add some error handling in for good measure. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 28 1月, 2010 1 次提交
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由 Paul Mundt 提交于
arch/sh/drivers/pci/pci.c:167: error: assignment of read-only location '*res' Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 24 8月, 2009 1 次提交
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由 David McKay 提交于
The synopsys PCI cell used in the later STMicro chips requires code to be run in order to do IO cycles, rather than just memory mapping the IO space. Rather than extending the existing SH infrastructure to allow this, use the GENERIC_IOMAP implmentation to save re-inventing the wheel. This set of changes allows the SH to be built with GENERIC_IOMAP enabled, it just ifdef's out the functions provided by the GENERIC_IOMAP implementation, and provides a few required missing functions. Signed-off-by: NDavid McKay <david.mckay@st.com> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 16 6月, 2009 1 次提交
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由 Paul Mundt 提交于
Some host controllers (such as SH7786) have overlapping regions that are fixed in hardware. The resource allocator does the right thing in managing this space already, so the conflict case is non-fatal. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 20 4月, 2009 10 次提交
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由 Paul Mundt 提交于
pci-new.c is now in a state to replace the old pci.c, rename it accordingly. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Now that the pci-auto cruft is gone, pci-lib can go away. Roll it back in to pci-new.c where it originally split off from. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This moves the remaining common bits in to pci-lib. Thereby reducing pci.c/pci-new.c to simple bus fixups and controller registration. As more platforms are moved over, the old code will disappear completely and the pci-new bits will be rolled in to pci-lib, eventually replacing pci.c completely. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
Now that the io and mem offsets are tracked accordingly, the pci-new version of the bus<->resource mappers can be used generically. This moves them in to pci-lib. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This implements a per-hose offset for I/O and mem resources. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This moves off of the board_pci_channels[] approach for bus registration and over to a cleaner register_pci_controller(), all derived from the MIPS code. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This consolidates the pci_iomap() definitions and reworks how the I/O port base is handled. PCI channels can register their own I/O map base, or if none is provided, the system-wide generic I/O base is used instead. Functionally nothing changes, while this allows us to kill off lots of I/O address special casing and lookups. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This introduces a saner pcibios_align_resource() that can be used regardless of whether pci-auto or pci-new are being used, and consolidates it in pci-lib.c. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
This splits off a 'pci-new.c' which is aimed at gradually replacing the pci-auto backend and the arch/sh/drivers/pci/pci.c core respectively. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Paul Mundt 提交于
The new PCI code wants its own bus<->resource mappings instead of the generic equivalents, so drop the asm-generic include in preparation. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 16 4月, 2009 3 次提交
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由 Magnus Damm 提交于
Instead of sometimes exporting board_pci_channels[] in the board specific code just export it in one place. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
This patch changes the code to use __is_pci_memory() instead of is_pci_memaddr(). __is_pci_memory() loops through all the pci channels on the system to match memory windows. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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由 Magnus Damm 提交于
This patch adds an init callback to struct pci_channel and makes sure it is initialized properly. Code is added to call this init function from pcibios_init(). Return values are adjusted and a warning is is printed if init fails. Signed-off-by: NMagnus Damm <damm@igel.co.jp> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 14 4月, 2009 1 次提交
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由 Paul Mundt 提交于
This adds in the pci_bus_type for DMA API debug. Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 08 1月, 2009 2 次提交
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由 Bjorn Helgaas 提交于
Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the sh simple_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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由 Bjorn Helgaas 提交于
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 28 7月, 2008 1 次提交
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由 Adrian Bunk 提交于
This patch makes the needlessly global pcibios_max_latency static. Signed-off-by: NAdrian Bunk <bunk@kernel.org> Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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- 28 6月, 2008 1 次提交
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由 Adrian Bunk 提交于
Russell King did the following back in 2003: <-- snip --> [PCI] pci-9: Kill per-architecture pcibios_update_resource() Kill pcibios_update_resource(), replacing it with pci_update_resource(). pci_update_resource() uses pcibios_resource_to_bus() to convert a resource to a device BAR - the transformation should be exactly the same as the transformation used for the PCI bridges. pci_update_resource "knows" about 64-bit BARs, but doesn't attempt to set the high 32-bits to anything non-zero - currently no architecture attempts to do something different. If anyone cares, please fix; I'm going to reflect current behaviour for the time being. Ivan pointed out the following architectures need to examine their pcibios_update_resource() implementation - they should make sure that this new implementation does the right thing. #warning's have been added where appropriate. ia64 mips mips64 This cset also includes a fix for the problem reported by AKPM where 64-bit arch compilers complain about the resource mask being placed in a u32. <-- snip --> This patch removes the unused pcibios_update_resource() functions the kernel gained since, from FRV, m68k, mips & sh architectures. Signed-off-by: NAdrian Bunk <bunk@kernel.org> Acked-by: NDavid Howells <dhowells@redhat.com> Acked-by: NGreg Ungerer <gerg@uclinux.org> Acked-by: NPaul Mundt <lethal@linux-sh.org> Acked-by: NRalf Baechle <ralf@linux-mips.org> Signed-off-by: NJesse Barnes <jbarnes@virtuousgeek.org>
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- 29 4月, 2008 1 次提交
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由 Benjamin Herrenschmidt 提交于
Almost all implementations of pci_iomap() in the kernel, including the generic lib/iomap.c one, copies the content of a struct resource into unsigned long's which will break on 32 bits platforms with 64 bits resources. This fixes all definitions of pci_iomap() to use resource_size_t. I also "fixed" the 64bits arch for consistency. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Cc: <linux-arch@vger.kernel.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 28 1月, 2008 1 次提交
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由 Paul Mundt 提交于
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>
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