1. 22 7月, 2015 1 次提交
  2. 25 3月, 2015 1 次提交
    • H
      s390: remove 31 bit support · 5a79859a
      Heiko Carstens 提交于
      Remove the 31 bit support in order to reduce maintenance cost and
      effectively remove dead code. Since a couple of years there is no
      distribution left that comes with a 31 bit kernel.
      
      The 31 bit kernel also has been broken since more than a year before
      anybody noticed. In addition I added a removal warning to the kernel
      shown at ipl for 5 minutes: a960062e ("s390: add 31 bit warning
      message") which let everybody know about the plan to remove 31 bit
      code. We didn't get any response.
      
      Given that the last 31 bit only machine was introduced in 1999 let's
      remove the code.
      Anybody with 31 bit user space code can still use the compat mode.
      Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      5a79859a
  3. 09 10月, 2014 2 次提交
    • M
      s390/kdump: add support for vector extension · a62bc073
      Michael Holzheu 提交于
      With this patch for kdump the s390 vector registers are stored into the
      prepared save areas in the old kernel and into the REGSET_VX_LOW and
      REGSET_VX_HIGH ELF notes for /proc/vmcore in the new kernel.
      
      The NT_S390_VXRS_LOW note contains the lower halves of the first 16 vector
      registers 0-15. The higher halves are stored in the floating point register
      ELF note.  The NT_S390_VXRS_HIGH contains the full vector registers 16-31.
      
      The kernel provides a save area for storing vector register in case of
      machine checks. A pointer to this save are is stored in the CPU lowcore
      at offset 0x11b0. This save area is also used to save the registers for
      kdump. In case of a dumped crashed kdump those areas are used to extract
      the registers of the production system.
      
      The vector registers for remote CPUs are stored using the "store additional
      status at address" SIGP. For the dump CPU the vector registers are stored
      with the VSTM instruction.
      
      With this patch also zfcpdump stores the vector registers.
      Reviewed-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMichael Holzheu <holzheu@linux.vnet.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      a62bc073
    • M
      s390: add support for vector extension · 80703617
      Martin Schwidefsky 提交于
      The vector extension introduces 32 128-bit vector registers and a set of
      instruction to operate on the vector registers.
      
      The kernel can control the use of vector registers for the problem state
      program with a bit in control register 0. Once enabled for a process the
      kernel needs to retain the content of the vector registers on context
      switch. The signal frame is extended to include the vector registers.
      Two new register sets NT_S390_VXRS_LOW and NT_S390_VXRS_HIGH are added
      to the regset interface for the debugger and core dumps.
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      80703617
  4. 16 7月, 2014 1 次提交
  5. 10 6月, 2014 1 次提交
    • M
      s390/uaccess: always load the kernel ASCE after task switch · f8b13505
      Martin Schwidefsky 提交于
      This patch fixes a problem introduced with git commit beef560b
      "s390/uaccess: simplify control register updates".
      
      The switch_mm function is not called if the next process is a kernel
      thread without an attached mm or is a nop if the mm does not change.
      But CR1 still needs to be loaded with the kernel ASCE in case the
      code returns to a uaccess function that uses the secondary space mode.
      
      In addition move the set_fs call from finish_arch_switch to
      finish_arch_post_lock_switch and then remove finish_arch_switch.
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      f8b13505
  6. 20 5月, 2014 1 次提交
    • M
      s390/uaccess: simplify control register updates · beef560b
      Martin Schwidefsky 提交于
      Always switch to the kernel ASCE in switch_mm. Load the secondary
      space ASCE in finish_arch_post_lock_switch after checking that
      any pending page table operations have completed. The primary
      ASCE is loaded in entry[64].S. With this the update_primary_asce
      call can be removed from the switch_to macro and from the start
      of switch_mm function. Remove the load_primary argument from
      update_user_asce/clear_user_asce, rename update_user_asce to
      set_user_asce and rename update_primary_asce to load_kernel_asce.
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      beef560b
  7. 03 4月, 2014 1 次提交
    • H
      s390/uaccess: rework uaccess code - fix locking issues · 457f2180
      Heiko Carstens 提交于
      The current uaccess code uses a page table walk in some circumstances,
      e.g. in case of the in atomic futex operations or if running on old
      hardware which doesn't support the mvcos instruction.
      
      However it turned out that the page table walk code does not correctly
      lock page tables when accessing page table entries.
      In other words: a different cpu may invalidate a page table entry while
      the current cpu inspects the pte. This may lead to random data corruption.
      
      Adding correct locking however isn't trivial for all uaccess operations.
      Especially copy_in_user() is problematic since that requires to hold at
      least two locks, but must be protected against ABBA deadlock when a
      different cpu also performs a copy_in_user() operation.
      
      So the solution is a different approach where we change address spaces:
      
      User space runs in primary address mode, or access register mode within
      vdso code, like it currently already does.
      
      The kernel usually also runs in home space mode, however when accessing
      user space the kernel switches to primary or secondary address mode if
      the mvcos instruction is not available or if a compare-and-swap (futex)
      instruction on a user space address is performed.
      KVM however is special, since that requires the kernel to run in home
      address space while implicitly accessing user space with the sie
      instruction.
      
      So we end up with:
      
      User space:
      - runs in primary or access register mode
      - cr1 contains the user asce
      - cr7 contains the user asce
      - cr13 contains the kernel asce
      
      Kernel space:
      - runs in home space mode
      - cr1 contains the user or kernel asce
        -> the kernel asce is loaded when a uaccess requires primary or
           secondary address mode
      - cr7 contains the user or kernel asce, (changed with set_fs())
      - cr13 contains the kernel asce
      
      In case of uaccess the kernel changes to:
      - primary space mode in case of a uaccess (copy_to_user) and uses
        e.g. the mvcp instruction to access user space. However the kernel
        will stay in home space mode if the mvcos instruction is available
      - secondary space mode in case of futex atomic operations, so that the
        instructions come from primary address space and data from secondary
        space
      
      In case of kvm the kernel runs in home space mode, but cr1 gets switched
      to contain the gmap asce before the sie instruction gets executed. When
      the sie instruction is finished cr1 will be switched back to contain the
      user asce.
      
      A context switch between two processes will always load the kernel asce
      for the next process in cr1. So the first exit to user space is a bit
      more expensive (one extra load control register instruction) than before,
      however keeps the code rather simple.
      
      In sum this means there is no need to perform any error prone page table
      walks anymore when accessing user space.
      
      The patch seems to be rather large, however it mainly removes the
      the page table walk code and restores the previously deleted "standard"
      uaccess code, with a couple of changes.
      
      The uaccess without mvcos mode can be enforced with the "uaccess_primary"
      kernel parameter.
      Reported-by: NChristian Borntraeger <borntraeger@de.ibm.com>
      Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      457f2180
  8. 24 10月, 2013 1 次提交
    • M
      s390: fix save and restore of the floating-point-control register · 4725c860
      Martin Schwidefsky 提交于
      The FPC_VALID_MASK has been used to check the validity of the value
      to be loaded into the floating-point-control register. With the
      introduction of the floating-point extension facility and the
      decimal-floating-point additional bits have been defined which need
      to be checked in a non straight forward way. So far these bits have
      been ignored which can cause an incorrect results for decimal-
      floating-point operations, e.g. an incorrect rounding mode to be
      set after signal return.
      
      The static check with the FPC_VALID_MASK is replaced with a trial
      load of the floating-point-control value, see test_fp_ctl.
      
      In addition an information leak with the padding word between the
      floating-point-control word and the floating-point registers in
      the s390_fp_regs is fixed.
      Reported-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Reviewed-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      4725c860
  9. 22 8月, 2013 1 次提交
  10. 16 7月, 2013 1 次提交
  11. 26 9月, 2012 1 次提交
    • J
      s390: add support for runtime instrumentation · e4b8b3f3
      Jan Glauber 提交于
      Allow user-space threads to use runtime instrumentation (RI). To enable RI
      for a thread there is a new s390 specific system call, sys_s390_runtime_instr,
      that takes as parameter a realtime signal number. If the RI facility is
      available the system call sets up a control block for the calling thread with
      the appropriate permissions for the thread to modify the control block.
      
      The user-space thread can then use the store and modify RI instructions to
      alter the control block and start/stop the instrumentation via RION/RIOFF.
      
      If the user specified program buffer runs full RI triggers an external
      interrupt. The external interrupt is translated to a real-time signal that
      is delivered to the thread that enabled RI on that CPU. The number of
      the real-time signal is the number specified in the RI system call. So,
      user-space can select any available real-time signal number in case the
      application itself uses real-time signals for other purposes.
      
      The kernel saves the RI control blocks on task switch only if the running
      thread was enabled for RI. Therefore, the performance impact on task switch
      should be negligible if RI is not used.
      
      RI is only enabled for user-space mode and is disabled for the supervisor
      state.
      Reviewed-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
      Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com>
      Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      e4b8b3f3
  12. 20 8月, 2012 2 次提交
    • F
      s390: Remove leftover account_tick_vtime() header · b9bb50db
      Frederic Weisbecker 提交于
      The function doesn't seem to exist anymore.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      b9bb50db
    • F
      cputime: Consolidate vtime handling on context switch · baa36046
      Frederic Weisbecker 提交于
      The archs that implement virtual cputime accounting all
      flush the cputime of a task when it gets descheduled
      and sometimes set up some ground initialization for the
      next task to account its cputime.
      
      These archs all put their own hooks in their context
      switch callbacks and handle the off-case themselves.
      
      Consolidate this by creating a new account_switch_vtime()
      callback called in generic code right after a context switch
      and that these archs must implement to flush the prev task
      cputime and initialize the next task cputime related state.
      Signed-off-by: NFrederic Weisbecker <fweisbec@gmail.com>
      Acked-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
      Cc: Tony Luck <tony.luck@intel.com>
      Cc: Fenghua Yu <fenghua.yu@intel.com>
      Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
      Cc: Paul Mackerras <paulus@samba.org>
      Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
      Cc: Ingo Molnar <mingo@kernel.org>
      Cc: Thomas Gleixner <tglx@linutronix.de>
      Cc: Peter Zijlstra <peterz@infradead.org>
      baa36046
  13. 29 3月, 2012 1 次提交