DP PHY now require pmu-system-controller to handle PMU register
to control PHY's power isolation. Adding the same to dp-phy
node.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NKukjin Kim <kgene@kernel.org>

This patch adds syscon based phandle to i2c device nodes of exynos5250
and exynos5420. These phandles will be used to save restore i2c sysreg
configuration register during s2r from i2c driver.

CC: Rob Herring <robh+dt@kernel.org>
CC: Randy Dunlap <rdunlap@infradead.org>
CC: Russell King <linux@arm.linux.org.uk>
CC: devicetree@vger.kernel.org
CC: linux-doc@vger.kernel.org
Signed-off-by: NPankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Explicitly set the dr_mode for the dwc3 controller on the
Snow board to host mode. This is required to ensure the
controller is initialized in the right mode if the kernel is
build with USB gadget support.
Signed-off-by: NSjoerd Simons <sjoerd.simons@collabora.co.uk>
Reviewed-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Instead of using the ADC_PHY register base address, use sysreg phandle
in ADC node to control ADC_PHY configuration register.

This patch adds syscon node for Exynos3250, Exynos4x12, Exynos5250,
and Exynos5420, Exynos5800.
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
To: linux-samsung-soc@vger.kernel.org
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NJonathan Cameron <jic23@kernel.org>

Allows them to be extended by reference.
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NAndreas Faerber <afaerber@suse.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

drivers/usb/phy/phy-samsung-usb2 driver got replaced by
drivers/phy/phy-samsung-usb2 one.  Remove the leftover
USB2 PHY node (EHCI/OHCI USB nodes are using the new one
already) from Exynos5250 dtsi file.

Cc: Mark Brown <broonie@linaro.org>
Cc: Kamil Debski <k.debski@samsung.com>
Cc: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: NBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: NVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: NJingoo Han <jg1.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch extends nodes of PMU system controller on Exynos4210, 4x12,
5250 and 5420 SoCs with newly defined properties used by Exynos CLKOUT
driver.
Signed-off-by: NTomasz Figa <t.figa@samsung.com>

Add PMU syscon handle to HDMI dt node for controlling
PHY Enable/Disable bit.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Phy and sss module device node missed clock macro.
This patch replace magic number with macros in clock
binding for exynos5250.
Signed-off-by: NBeomho Seo <beomho.seo@samsung.com>
Reviewed-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add support to PHY of USB2 of the Exynos5250 SoC.
Signed-off-by: NKamil Debski <k.debski@samsung.com>
[gautam.vivek@samsung.com: Split the usb phy entries]
[gautam.vivek@samsung.com: Added phy entry for OHCI also along with EHCI]
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: NVikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds sysreg-syscon node to exynos5250 and exynos5420 device
tree, to access System Register's registers using syscon driver.
Signed-off-by: NKamil Debski <k.debski@samsung.com>
[gautam.vivek@samsung.com: Split this syreg-syscon dts entry]
[gautam.vivek@samsung.com: added similar syscon entry for exynos5420]
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
[vikas.sajjan@samsung.com: updated the binding document]
Signed-off-by: NVikas Sajjan <vikas.sajjan@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Removing the dt node for older usb3 phy driver from Exynos5250
device tree and updating the dt node for DWC3 controller to
use new phy driver based on generic phy framework.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add device tree node for new usbdrd-phy driver, which
is based on generic phy framework.
Signed-off-by: NVivek Gautam <gautam.vivek@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Instead of hardcoding the SYSRAM details for each SoC,
pass this information through device tree (DT) and make
the code SoC agnostic. Generic DT SRAM bindings are
used for achieving this.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Acked-by: NHeiko Stuebner <heiko@sntech.de>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Most of the clock related dt-binding header files are located in
dt-bindings/clock folder. It would be good to keep all the similar
header files at a single location.
Signed-off-by: NTushar Behera <tushar.behera@linaro.org>
Reviewed-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add generic compatible strings to the respective board DT files.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Acked-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds dt entry for ahci sata controller and its
corresponding phy controller.phy node has been added w.r.t
new generic phy framework.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Acked-by: NKishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the device tree node for SSS module
found on Exynos5420 and Exynos5250
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The patch replaces magic numbers with macros defined in DT header
in exynos5250 clock bindings.
Signed-off-by: NAndrzej Hajda <a.hajda@samsung.com>
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Some boards might not have RTC xtal, so RTC shouldn't really be
enabled by default. Enable it in the required board files. For
now enable it for all board files to maintain the enabled status
exisitng prior to this patch.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In EXYNOS5 series SoCs, PMU has registers to enable/disable mask/unmask
watchdog timer which is not the case with s3c series SoCs so, there is a
need to have different compatible names for watchdog to handle these pmu
registers access.

Hence this patch removes watchdog node from Exynos5.dtsi common file and
make it separate by updating existing node in Exynos5250 and adding new node
to Exynos5420. This patch also makes the watchdog node enabled by default
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds pmusysreg node to exynos5250 and exynos5420 dtsi files to
handle PMU register accesses in a centralized way using syscon driver
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Tested-by: NDoug Anderson <dianders@chromium.org>
Acked-by: NGuenter Roeck <linux@roeck-us.net>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Specify pll_ref, pll_in, sclk_audio, and sclk_pcm_in for the AudioSS
clock controller.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NMike Turquette <mturquette@linaro.org>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NTomasz Figa <t.figa@samsung.com>

Due to incorrect clock specified in MDMA0 node, using MDMA0 controller
could cause system failures, due to wrong clock being controlled. This
patch fixes this by specifying correct clock.
Signed-off-by: NAbhilash Kesavan <a.kesavan@samsung.com>
Acked-by: NMike Turquette <mturquette@linaro.org>
[t.figa: Corrected commit message and description.]
Signed-off-by: NTomasz Figa <t.figa@samsung.com>

Ensure that unused I2C controllers are not activated, causing problems due
to inappropriate pinmuxing or similar, by marking the controllers as
disabled by default and requiring boards to explicitly enable those that
are in use.
Signed-off-by: NMark Brown <broonie@linaro.org>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Rather than requiring each board to explicitly disable the SPI controllers
it is not using instead require boards to enable those that they are using.
This is less work overall since normally at most one of the controllers is
in use and avoids issues caused by inappropriate pinmuxing.
Signed-off-by: NMark Brown <broonie@linaro.org>
Acked-by: NTomasz Figa <t.figa@samsung.com>
Reviewed-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add the device-tree binding for the PWM controller to Exynos5250 and Exynos5420
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Signed-off-by: NOlof Johansson <olofj@chromium.org>
Signed-off-by: NLeela Krishna Amudala <l.krishna@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch rename's the device tree mmc node's from "dwmmc" to "mmc".
According to ePAPR chapter 2.2.2 generic node name recommendation,
it has been opted change from dwmmc to mmc.Also this patch remove the
instance index from the node name.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

As fifo-depth property in dw_mmc device tree node is SOC
specific, move this property to exynos5250 SOC specific
file.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
[kgene.kim@samsung.com: squashed fifo-depth patch for cros5250-common]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

According to ePAPR, chapter 2.3.4, the status property has
defined that it should be set to "disabled" when "the device
is not presently operational, but it might become operational
in the future".

So this patch disable dwmmc node by "status = disabled" in SOC
dts file and enable dwmmc node by "status = okay" in board specific
dts file.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Added missing clock frequency property to CPU node to avoid
boot time warnings.
Signed-off-by: NSachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Exynos5 series SOC's 5250 and 5420 have different versions of
DWMMC controller.So there is a new compatible string to distinguish
between them.So these nodes should be moved out of Exynos5 series
common device tree source to SOC specific device tree source.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Without the "clock-frequency" property in arch timer node, could able
to see the below crash dump.

[<c0014e28>] (unwind_backtrace+0x0/0xf4) from [<c0011808>] (show_stack+0x10/0x14)
[<c0011808>] (show_stack+0x10/0x14) from [<c036ac1c>] (dump_stack+0x7c/0xb0)
[<c036ac1c>] (dump_stack+0x7c/0xb0) from [<c01ab760>] (Ldiv0_64+0x8/0x18)
[<c01ab760>] (Ldiv0_64+0x8/0x18) from [<c0062f60>] (clockevents_config.part.2+0x1c/0x74)
[<c0062f60>] (clockevents_config.part.2+0x1c/0x74) from [<c0062fd8>] (clockevents_config_and_register+0x20/0x2c)
[<c0062fd8>] (clockevents_config_and_register+0x20/0x2c) from [<c02b8e8c>] (arch_timer_setup+0xa8/0x134)
[<c02b8e8c>] (arch_timer_setup+0xa8/0x134) from [<c04b47b4>] (arch_timer_init+0x1f4/0x24c)
[<c04b47b4>] (arch_timer_init+0x1f4/0x24c) from [<c04b40d8>] (clocksource_of_init+0x34/0x58)
[<c04b40d8>] (clocksource_of_init+0x34/0x58) from [<c049ed8c>] (time_init+0x20/0x2c)
[<c049ed8c>] (time_init+0x20/0x2c) from [<c049b95c>] (start_kernel+0x1e0/0x39c)

THis is because the Exynos u-boot, for example on the Chromebooks, doesn't set
up the CNTFRQ register as expected by arch_timer. Instead, we have to specify
the frequency in the device tree like this.
Signed-off-by: NYuvaraj Kumar C D <yuvaraj.cd@samsung.com>
[olof: Changed subject, added comment, elaborated on commit message]
Signed-off-by: NOlof Johansson <olof@lixom.net>

Fix wrong clock numbers in hdmi dt node. Removed hdmiphy
clock which was a dummy clock earlier and not required now.
Also added mux clock to change the clock parent.
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the mixer clocks to the mixer node in the
exynos 5250 dts file.
Signed-off-by: NSean Paul <seanpaul@chromium.org>
Signed-off-by: NRahul Sharma <rahul.sharma@samsung.com>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Rather than requiring each board to explicitly disable the I2S controllers
it is not using instead require boards to enable those that they are using.

This is required for audio operation on Arndale, one of the unused I2S
controllers is pinmuxed with the LDO enable GPIOs for the WM1811A.
Signed-off-by: NMark Brown <broonie@linaro.org>
Acked-by: NMark Rutland <mark.rutland@arm.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Add ADC device tree node for exynos5420 and exynos5250
Signed-off-by: NNaveen Krishna Chatradhi <ch.naveen@samsung.com>
Signed-off-by: NDoug Anderson <dianders@chromium.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Moves the RTC DT node's "status" property from exynos5250 board
(arndale & snow) dts files to exynos5250.dtsi, since the bindings
in exynos5250.dtsi depicts the RTC h/w completely.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Fixes the RTC DT node name for Exynos5250 as per the DT node naming
convention.
Signed-off-by: NVikas Sajjan <vikas.sajjan@linaro.org>
Reviewed-by: NTomasz Figa <t.figa@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The patch adds the MFC clock entry for the 5250 SoC.
Signed-off-by: NArun Kumar K <arun.kk@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>