There is alreay an entry for all the backends, but those entries do
not cover all the fsnotify files.
Signed-off-by: NAmir Goldstein <amir73il@gmail.com>
Signed-off-by: NJan Kara <jack@suse.cz>

MAINTAINERS is out of date for leaking_addresses.pl. There is now a tree on
kernel.org for development of this script.  We have a second maintainer now,
thanks Tycho.  Development of this scripts was started on kernel-hardening
mailing list so let's keep it there.

Update maintainer details; Add mailing list, kernel.org hosted tree, and second
maintainer.
Signed-off-by: NTobin C. Harding <me@tobin.cc>

Synaptics has acquired the Multimedia Solutions Business of Marvell[1].
So change the berlin entry name and move it to its alphabetical
location. We move to ARM/Synaptics instead of ARM/Marvell.

This patch also updates my email address from marvell to synaptics.

[1] https://www.synaptics.com/company/news/conexant-marvellSigned-off-by: NJisheng Zhang <Jisheng.Zhang@synaptics.com>
Reviewed-by: NAndrew Lunn <andrew@lunn.ch>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

This is a cleaned up version of the I2C controller driver for
the Fujitsu F_I2C IP, which was never supported upstream, and
has now been incorporated into the Socionext SynQuacer SoC.
Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
[wsa: updated MAINTAINERS entry and removed two empty lines]
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

Add John Garry as maintainer for drivers/bus/hisi_lpc.c, the HiSilicon LPC
driver.
Signed-off-by: NJohn Garry <john.garry@huawei.com>
Signed-off-by: NBjorn Helgaas <bhelgaas@google.com>

Commit 37dddf14 ("PCI: cadence: Add EndPoint Controller driver for
Cadence PCIe controller") created the /drivers/pci/cadence directory to
keep in a single place Cadence host and endpoint controller drivers.

Since code in /drivers/pci/cadence falls within the PCI native host
bridge and endpoint controllers mainteinance remit, that maintainer
entry should have been updated too by adding the /drivers/pci/cadence
directory to it but it actually was not.

Update the MAINTAINERS entry accordingly, fixing the omission.
Signed-off-by: NLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Alan Douglas <adouglas@cadence.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>

Baptiste has changed positions and has not been active with
vfio-platform, replace with the current, de-facto sub-maintainer
Eric Auger.
Acked-by: NEric Auger <eric.auger@redhat.com>
Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>

Because I will be leaving Samsung soon, update my e-mail address
to andi@etezian.org

For reachability update also mailcap.

CC: Krzysztof Kozlowski <krzk@kernel.org>
CC: Kukjin Kim <kgene@kernel.org>
CC: linux-samsung-soc@vger.kernel.org
Signed-off-by: NAndi Shyti <andi.shyti@samsung.com>
Signed-off-by: NMark Brown <broonie@kernel.org>

The freescale.com address will no longer be available.
Signed-off-by: NClaudiu Manoil <claudiu.manoil@nxp.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Shrikrishna Khare would no longer maintain the vmxnet3 driver. Taking
over the role of vmxnet3 maintainer.
Signed-off-by: NRonak Doshi <doshir@vmware.com>
Signed-off-by: NShrikrishna Khare <skhare@vmware.com>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

remove myself as MTD and SPI NOR maintainer.
Signed-off-by: NCyrille Pitchen <cyrille.pitchen@wedev4u.fr>
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

As of the start of 2018, I am no longer paid to support the core 32-bit
ARM architecture code.  This means that this code is no longer
commercially supported, and is now only supported through voluntary
effort.

I will continue to merge patches as and when able, but this will be at a
lower priority than before (which means a longer latency.) I have also
be scaled back the amount of time spent reading email, so email that is
intended for my attention needs to make itself plainly obvious, or I
will miss it.

In an attempt to reduce the amount of email Cc'd to me, exclude
arch/arm/boot/dts from the maintainers patterns, but add entries for the
SolidRun platforms I look after.

Link: http://lkml.kernel.org/r/E1ezkgn-0002fO-52@rmk-PC.armlinux.org.ukSigned-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Correct my email address in the MAINTAINTERS file.

Link: http://lkml.kernel.org/r/E1ezkgi-0002fH-01@rmk-PC.armlinux.org.ukSigned-off-by: NRussell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Although all components of drivers/hwtracing are Maintained, the
directory itself isn't, which leads to confusion when people want
to patch the Kconfig file, for example.

This adds an entry to the MAINTAINERS file with myself as a
maintainer.
Signed-off-by: NAlexander Shishkin <alexander.shishkin@linux.intel.com>

This patch adds a basic driver framework for the Intel(R) E800 Ethernet
Series of network devices. There is no functionality right now other than
the ability to load.
Signed-off-by: NAnirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: NTony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: NJeff Kirsher <jeffrey.t.kirsher@intel.com>

Change email account for unicore32 arch and pkunity soc drivers
Since old email server mprc.pku.edu.cn was blocked in recent years
Signed-off-by: NGuan Xuetao <gxt@pku.edu.cn>
Cc: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The blackfin architecture is getting removed, so the timer trigger
driver is now obsolete. Since this is the last remaining iio trigger
driver in staging, I'm removing the entire directory.
Acked-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: NAaron Wu <aaron.wu@analog.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

Steer patches to Documentation/driver-api/gpio/ into the right
direction.
Signed-off-by: NJonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>

I'd like to use my personal e-mail for Ocfs2 requests and review.

Link: http://lkml.kernel.org/r/20180311231356.9385-1-mfasheh@versity.comSigned-off-by: NMark Fasheh <mark@fasheh.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Document the core of the debugfs CEC error injection ABI.

The driver specific commands are documented elsewhere and
this file points to that documentation.
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>

Add a driver for the Pericom PI3USB30532 Type-C cross switch /
mux chip found on some devices with a Type-C port.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

Various Intel SoCs (Cherry Trail, Broxton and others) have an internal USB
role switch for swiching the OTG USB data lines between the xHCI host
controller and the dwc3 gadget controller.

Note on some Cherry Trail systems there is ACPI/AML code listening to
edge interrupts on the id-pin (through an _AIE ACPI method) and switching
the role between ROLE_HOST and ROLE_NONE based on the id-pin. Note it does
not set the role to ROLE_DEVICE, because device-mode is usually not used
under Windows.

The presence of AML code which modifies the cfg0 reg (on some systems)
means that our read/write/modify of cfg0 may race with the AML code
doing the same to avoid this we take the global ACPI lock while doing
the read/write/modify.
Signed-off-by: NHans de Goede <hdegoede@redhat.com>
Reviewed-by: NAndy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: NHeikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The soc-camera framework is deprecated, patches for it are very rare
and only contain trivial clean up. Further I haven't got any more
soc-camera systems running modern kernels.
Signed-off-by: NGuennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>

Add entry for Aptina/Micron MT9T112 camera sensor. The driver is
maintained by me for "Odd Fixes" only due to lack of suitable hardware
for testing.
Signed-off-by: NJacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: NHans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>

These devices were supported by the lirc_imon.c driver which was removed
from staging in commit f41003a2 ("[media] staging: lirc_imon: port
remaining usb ids to imon and remove").
Signed-off-by: NSean Young <sean@mess.org>
Signed-off-by: NMauro Carvalho Chehab <mchehab@s-opensource.com>

Update to show Minas Harutyunyan as the new maintainer for dwc2.
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Acked-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

This will make it much easier to manage as we manage to
keep trimming componnents down into their own files to more
easily manage and maintain this codebase.
Suggested-by: NKees Cook <keescook@chromium.org>
Signed-off-by: NLuis R. Rodriguez <mcgrof@kernel.org>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

These drivers haven't seen any recent bug fixing and are two of the last
drivers using the scsi_module.c infrastruture that has been deprecated
15 years ago.
Signed-off-by: NChristoph Hellwig <hch@lst.de>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

Create a common header file for well-known values and structures to be
shared by the Linux kernel with qemu or other projects.

It is based from qemu/docs/specs/fw_cfg.txt which references
qemu/include/hw/nvram/fw_cfg_keys.h "for the most up-to-date and
authoritative list" & vmcoreinfo.txt. Those files don't have an
explicit license, but qemu/hw/nvram/fw_cfg.c is BSD-license, so
Michael S. Tsirkin suggested to use the same license.

The patch intentionally left out DMA & vmcoreinfo structures &
defines, which are added in the commits making usage of it.
Suggested-by: NMichael S. Tsirkin <mst@redhat.com>
Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>

Free Electrons is now Bootlin, change my email address accordingly
Signed-off-by: NGregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: NWolfram Sang <wsa@the-dreams.de>

The port was added back in 2000 so it's no longer even a good source
of inspiration for newer ports (if it ever was)

The last SoC (ARTPEC-3) with a CRIS main CPU was launched in 2008.

Coupled with time and working developer board hardware being
in low supply, it's time to drop the port from Linux.

So long and thanks for all the fish!
Signed-off-by: NJesper Nilsson <jesper.nilsson@axis.com>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The Tile architecture port was added by Chris Metcalf in 2010, and
maintained until early 2018 when he orphaned it due to his departure
from Mellanox, and nobody else stepped up to maintain it. The product
line is still around in the form of the BlueField SoC, but no longer
uses the Tile architecture.

There are also still products for sale with Tile-GX SoCs, notably the
Mikrotik CCR router family. The products all use old (linux-3.3) kernels
with lots of patches and won't be upgraded by their manufacturers. There
have been efforts to port both OpenWRT and Debian to these, but both
projects have stalled and are very unlikely to be continued in the future.

Given that we are reasonably sure that nobody is still using the port
with an upstream kernel any more, it seems better to remove it now while
the port is in a good shape than to let it bitrot for a few years first.

Cc: Chris Metcalf <chris.d.metcalf@gmail.com>
Cc: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
Link: http://www.mellanox.com/page/npu_multicore_overview
Link: https://jenkins.debian.net/view/rebootstrap/job/rebootstrap_tilegx_gcc7/Signed-off-by: NArnd Bergmann <arnd@arndb.de>

The Analog Devices Blackfin port was added in 2007 and was rather
active for a while, but all work on it has come to a standstill
over time, as Analog have changed their product line-up.

Aaron Wu confirmed that the architecture port is no longer relevant,
and multiple people suggested removing blackfin independently because
of some of its oddities like a non-working SMP port, and the amount of
duplication between the chip variants, which cause extra work when
doing cross-architecture changes.

Link: https://docs.blackfin.uclinux.org/Acked-by: NAaron Wu <Aaron.Wu@analog.com>
Acked-by: NBryan Wu <cooloney@gmail.com>
Cc: Steven Miao <realmz6@gmail.com>
Cc: Mike Frysinger <vapier@chromium.org>
Signed-off-by: NArnd Bergmann <arnd@arndb.de>

All of these defines are part of the uABI for the driver, this
header duplicates providers/i40iw/i40iw-abi.h in rdma-core.
Acked-by: NShiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: NJason Gunthorpe <jgg@mellanox.com>

Move onenand code base to the drivers/mtd/nand directory in the hope
that someday someone will patch it to use the generic NAND helpers.
If it never happens, at least we'll have all NAND related support in a
single directory and not spread over the drivers/mtd/ directory.
Signed-off-by: NBoris Brezillon <boris.brezillon@bootlin.com>

These two drivers do not appear to be in active use. Deprecate them.
Suggested-by: NChristoph Hellwig <hch@lst.de>
Signed-off-by: NMartin K. Petersen <martin.petersen@oracle.com>

Signed-off-by: NRazvan Stefanescu <razvan.stefanescu@nxp.com>
Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>

The blackfin architecture is getting removed, so the ASoC drivers
are all obsolete as well.
Signed-off-by: NArnd Bergmann <arnd@arndb.de>
Signed-off-by: NMark Brown <broonie@kernel.org>

Add support for Microchip digital potentiometers and rheostats
	MCP4017, MCP4018, MCP4019

They all have one wiper with 128 steps and come in 5, 10, 50 and 100 kOhm
variations.

Datasheet: http://www.microchip.com/downloads/en/DeviceDoc/22147a.pdfSigned-off-by: NPeter Rosin <peda@axentia.se>
Signed-off-by: NJonathan Cameron <Jonathan.Cameron@huawei.com>

The Sunplus S+core architecture was added in 2009 by Chen Liqin,
who has been co-maintaining it with Lennox Wu <lennox.wu@gmail.com>
since then, but after they both left the company, nobody else has shown
any interest in the port and it has seen almost no activity other than
tree-wide changes.

The gcc port was removed a few years ago due to the inactivity.

While the sunplus website still advertises products with unspecified
RISC cores that might be S+core based, it's very clear that the Linux
port is completely abandoned at this point.

This removes all files related to the architecture.
Acked-by: NLennox Wu <lennox.wu@gmail.com>
Link: http://www.sunplus.com/Signed-off-by: NArnd Bergmann <arnd@arndb.de>