- 12 6月, 2012 1 次提交
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由 Sonic Zhang 提交于
The CRC peripheral is a hardware block used to compute the CRC of the block of data. This is based on a CRC32 engine which computes the CRC value of 32b data words presented to it. For data words of < 32b in size, this driver pack 0 automatically into 32b data units. This driver implements the async hash crypto framework API. Signed-off-by: NSonic Zhang <sonic.zhang@analog.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 16 5月, 2012 2 次提交
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由 Heiko Carstens 提交于
Add missing "select CRYPTO_DES". Fixes this: ERROR: "des_ekey" [arch/s390/crypto/des_s390.ko] undefined! Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Kent Yoder 提交于
These files support configuring and building the nx device driver. Signed-off-by: NKent Yoder <key@linux.vnet.ibm.com> Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
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- 15 5月, 2012 1 次提交
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由 Alexander Clouter 提交于
Without CRYPTO_HASH being selected, mv_cesa has a lot of hooks into undefined exports. ---- MODPOST 81 modules Kernel: arch/arm/boot/Image is ready AS arch/arm/boot/compressed/head.o GZIP arch/arm/boot/compressed/piggy.gzip CC arch/arm/boot/compressed/misc.o CC arch/arm/boot/compressed/decompress.o ERROR: "crypto_ahash_type" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_shash_final" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_register_ahash" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_unregister_ahash" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_shash_update" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_shash_digest" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_shash_setkey" [drivers/crypto/mv_cesa.ko] undefined! ERROR: "crypto_alloc_shash" [drivers/crypto/mv_cesa.ko] undefined! make[1]: *** [__modpost] Error 1 make: *** [modules] Error 2 make: *** Waiting for unfinished jobs.... ---- Signed-off-by: NAlexander Clouter <alex@digriz.org.uk> Signed-off-by: NJason Cooper <jason@lakedaemon.net> Cc: stable@vger.kernel.org
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- 04 5月, 2012 1 次提交
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由 Andreas Westin 提交于
This adds a driver for the ST-Ericsson ux500 crypto hardware module. It supports AES, DES and 3DES, the driver implements support for AES-ECB,CBC and CTR. Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NAndreas Westin <andreas.westin@stericsson.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 11 3月, 2012 1 次提交
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由 Holger Dengler 提交于
Remove the option to build a single module z90crypt that contains ap bus, request router and card drivers. Signed-off-by: NHolger Dengler <hd@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 13 1月, 2012 1 次提交
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由 Varun Wadekar 提交于
driver supports ecb/cbc/ofb/ansi_x9.31rng modes, 128, 192 and 256-bit key sizes Signed-off-by: NVarun Wadekar <vwadekar@nvidia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 10月, 2011 1 次提交
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由 Richard Weinberger 提交于
hifn_795x works only on 32 bit, remove the detection while loading the module and catch non-32 bit systems at build time. Signed-off-by: NRichard Weinberger <richard@nod.at> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 20 10月, 2011 1 次提交
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由 Jamie Iles 提交于
The picoxcell crypto driver requires the clk API, but the platform in mainline does not currently support it. Add an explicit dependency on HAVE_CLK to avoid build breakage. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 23 5月, 2011 1 次提交
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由 Holger Dengler 提交于
The registration of an ap device will be skipped, if the device type probing fails. Add names of current crypto adapters to the Kconfig help. Signed-off-by: NHolger Dengler <hd@linux.vnet.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 04 5月, 2011 4 次提交
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由 Gerald Schaefer 提交于
This patch adds System z hardware acceleration support for AES, DES and 3DES in CTR mode. The hardware support is available starting with System z196. Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jan Glauber 提交于
Cleanup the remaining s390 crypto options by mentioning the earliest machine type that supports an accelerated algorithm. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Gerald Schaefer 提交于
This patch adds System z hardware acceleration support for the GHASH algorithm for GCM (Galois/Counter Mode). The hardware support is available beginning with System z196. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Gerald Schaefer 提交于
This patch adds System z hardware acceleration support for the AES XTS mode. The hardware support is available beginning with System z196. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NGerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 08 4月, 2011 1 次提交
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由 Vladimir Zapolskiy 提交于
This change adds support for AES encrypting and decrypting using advanced crypto engine found on Samsung S5PV210 and S5PC110 SoCs. Signed-off-by: NVladimir Zapolskiy <vzapolskiy@gmail.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 27 3月, 2011 1 次提交
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由 Kim Phillips 提交于
The SEC4 supercedes the SEC2.x/3.x as Freescale's Integrated Security Engine. Its programming model is incompatible with all prior versions of the SEC (talitos). The SEC4 is also known as the Cryptographic Accelerator and Assurance Module (CAAM); this driver is named caam. This initial submission does not include support for Data Path mode operation - AEAD descriptors are submitted via the job ring interface, while the Queue Interface (QI) is enabled for use by others. Only AEAD algorithms are implemented at this time, for use with IPsec. Many thanks to the Freescale STC team for their contributions to this driver. Signed-off-by: NSteve Cornelius <sec@pobox.com> Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 2月, 2011 1 次提交
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由 Jamie Iles 提交于
Picochip picoXcell devices have two crypto engines, one targeted at IPSEC offload and the other at WCDMA layer 2 ciphering. Signed-off-by: NJamie Iles <jamie@jamieiles.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 12 9月, 2010 1 次提交
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由 David S. Miller 提交于
Reported-by: NDennis Gilmore <dennis@ausil.us> Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 03 9月, 2010 1 次提交
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由 Dmitry Kasatkin 提交于
Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 13 8月, 2010 1 次提交
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由 Heiko Carstens 提交于
warning: (ZCRYPT && CRYPTO && CRYPTO_HW && S390 && ZCRYPT=y) selects ZCRYPT_MONOLITHIC which has unmet direct dependencies (ZCRYPT=m) ZCRYPT_MONOLITHIC should not depend on ZCRYPT="m" when it gets selected if ZCRYPT="y". Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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- 19 5月, 2010 1 次提交
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由 David S. Miller 提交于
Current deficiencies: 1) No HMAC hash support yet. 2) Although the algs are registered as ASYNC they always run synchronously. Signed-off-by: NDavid S. Miller <davem@davemloft.net> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 03 5月, 2010 1 次提交
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由 Dmitry Kasatkin 提交于
Earlier kernel contained omap sha1 and md5 driver, which was not maintained, was not ported to new crypto APIs and removed from the source tree. - implements async crypto API using dma and cpu. - supports multiple sham instances if available - hmac - concurrent requests Signed-off-by: NDmitry Kasatkin <dmitry.kasatkin@nokia.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 10 8月, 2009 1 次提交
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This adds support for Marvell's Cryptographic Engines and Security Accelerator (CESA) which can be found on a few SoC. Tested with dm-crypt. Acked-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 14 7月, 2009 1 次提交
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由 Herbert Xu 提交于
This patch converts the padlock-sha implementation to shash. In doing so the existing mechanism of storing the data until final is no longer viable as we do not have a way of allocating data in crypto_shash_init and then reliably freeing it. This is just as well because a better way of handling the problem is to hash everything but the last chunk using normal sha code and then provide the intermediate result to the padlock device. This is good enough because the primary application of padlock-sha is IPsec and there the data is laid out in the form of an hmac header followed by the rest of the packet. In essence we can provide all the data to the padlock as the hmac header only needs to be hashed once. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 13 6月, 2009 1 次提交
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由 Pavel Machek 提交于
.ko is normally not included in Kconfig help, make it consistent. Signed-off-by: NPavel Machek <pavel@ucw.cz> Signed-off-by: NJiri Kosina <jkosina@suse.cz>
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- 02 6月, 2009 2 次提交
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由 Herbert Xu 提交于
When we added 64-bit support to padlock the dependency on x86 was lost. This causes build failures on non-x86 architectures. Reported-by: NStephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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Almost everything stays the same, we need just to use the extended registers on the bit variant. Signed-off-by: NSebastian Andrzej Siewior <sebastian@breakpoint.cc> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 18 2月, 2009 2 次提交
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由 James Hsiao 提交于
This patch adds support for AMCC ppc4xx security device driver. This is the initial release that includes the driver framework with AES and SHA1 algorithms support. The remaining algorithms will be released in the near future. Signed-off-by: NJames Hsiao <jhsiao@amcc.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Herbert Xu 提交于
This patch converts the S390 sha algorithms to the new shash interface. With fixes by Jan Glauber. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 13 7月, 2008 1 次提交
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由 Imre Kaloz 提交于
Without CRYPTO_AUTHENC the driver fails to build: drivers/built-in.o: In function `ixp_module_init': ixp4xx_crypto.c:(.init.text+0x3250): undefined reference to `crypto_aead_type' Signed-off-by: NImre Kaloz <kaloz@openwrt.org> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 10 7月, 2008 2 次提交
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由 Christian Hohnstaedt 提交于
Add support for the hardware crypto engine provided by the NPE C of the Intel IXP4xx networking processor series. Supported ciphers: des, des3, aes and a combination of them with md5 and sha1 hmac Signed-off-by: NChristian Hohnstaedt <chohnstaedt@innominate.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Kim Phillips 提交于
Add support for the SEC available on a wide range of PowerQUICC devices, e.g. MPC8349E, MPC8548E. This initial version supports authenc(hmac(sha1),cbc(aes)) for use with IPsec. Signed-off-by: NKim Phillips <kim.phillips@freescale.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 21 4月, 2008 3 次提交
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由 Sebastian Siewior 提交于
The Padlock AES setkey routine is the same as exported by the generic implementation. So we could use it. Signed-off-by: NSebastian Siewior <sebastian@breakpoint.cc> Cc: Michal Ludvig <michal@logix.cz> Tested-by: NStefan Hellermann <stefan@the2masters.de> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jan Glauber 提交于
Exploit the System z10 hardware acceleration for SHA384. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jan Glauber 提交于
Exploit the System z10 hardware acceleration for SHA512. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 17 4月, 2008 1 次提交
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由 Ralph Wuerthner 提交于
This patch allows user space applications to access large amounts of truly random data. The random data source is the build-in hardware random number generator on the CEX2C cards. Signed-off-by: NRalph Wuerthner <rwuerthn@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by: NHeiko Carstens <heiko.carstens@de.ibm.com>
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- 26 1月, 2008 2 次提交
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由 Jan Glauber 提交于
Move s390 crypto Kconfig options to drivers/crypto/Kconfig to have all hardware crypto devices in one place. This also makes messing up the kernel source tree easier for some people. Signed-off-by: NJan Glauber <jan.glauber@de.ibm.com> Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>
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由 Herbert Xu 提交于
Currently it is possible to select HW_RANDOM as a module and have hifn795x built-in. This causes a build problem because hifn795x will then call hwrng_register which isn't built-in. This patch introduces a new config option to control the hifn795x RNG which lets us avoid this problem. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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- 11 1月, 2008 2 次提交
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由 Herbert Xu 提交于
With the impending addition of the givcipher type, both blkcipher and ablkcipher algorithms will use it to create givcipher objects. As such it no longer makes sense to split the system between ablkcipher and blkcipher. In particular, both ablkcipher.c and blkcipher.c would need to use the givcipher type which has to reside in ablkcipher.c since it shares much code with it. This patch merges the two Kconfig options as well as the modules into one. Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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由 Jan Glauber 提交于
The HIFN driver is currently selectable on s390 but wont compile. Since it looks like HIFN needs PCI make the Kconfig dependent on PCI, which is not available on s390. Signed-off-by: NJan Glauber <jang@linux.vnet.ibm.com> Acked-by: NEvgeniy Polyakov <johnpol@2ka.mipt.ru> Signed-off-by: NHerbert Xu <herbert@gondor.apana.org.au>
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