Add read/write function pointers to struct nand_ecc_ctrl to
prepare the modulaization of nand_read/write functions. The
current implementation handles every type of ecc mode
software/hardware and all kinds of strange ecc placement
schemes in one switch/if construct. Thats too complex to
maintain and too inflexible to expand. Modularization will
also shorten the code pathes of the read/write functions.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

FLASH - especially NAND FLASH - will become less reliable
and bit flips more likely. Add an ECC statistics struct
to struct mtd_info to keep track of this.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Cleanup the code in the oob related functions and
make use of the new NO_READRDY flag.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The nand driver has a superflous read ready / command
delay in the read functions. This was added to handle
chips which have an automatic read forward. Newer
chips do not have this functionality anymore. Add this
option to avoid the delay / I/O operation. Mark all
large page chips with the new option flag.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The lock simplifying patch did not move the lock and waitqueue
initialization into the controller allocation patch.
This reinitializes waitqueue and spinlocks also for driver
supplied controller stuctures. Move it into the allocation path.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Print wasted_size in scanned eraseblocks, print range correctly for
summary dirent and inode entries.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Preallocation of refs is shortly going to be a per-eraseblock thing,
rather than per-filesystem. Add the required argument to the function.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

... to jffs2_free_jeb_node_refs() since that's what it does.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

One more place where we were changing the accounting info without
actually allocating a ref for the lost space...
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

The cmd_ctrl rework lacks some state transition flags.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Cleanup the functions which are not going to change in the
next steps.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Random unthinking 'cleanup' caused debug messages like this:
   Obsoleting node at 0x0006daf4 of len 0x3a4: <7>Dirtying

If messages are continuation of an existing line, they don't need
to be prefixed with KERN_DEBUG.

THINK. Or you will be replaced by a small shell script.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Another part of the preparation for switching to an array...
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

As the first step towards eliminating the ref->next_phys member and saving
memory by using an _array_ of struct jffs2_raw_node_ref per eraseblock,
stop the write functions from allocating their own refs; have them just
_reserve_ the appropriate number instead. Then jffs2_link_node_ref() can
just fill them in.

Use a linked list of pre-allocated refs in the superblock, for now. Once
we switch to an array, it'll just be a case of extending that array.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

Move the define out of the middle of the code and add an
appropriate comment.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The previous change of the command / hardware control allows to
remove the write_byte/word functions completely, as their only
user were nand_command and nand_command_lp.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The hwcontrol function enforced a step by step state machine
for any kind of hardware chip access. Let the hardware driver
know which control bits are set and inform it about a change
of the control lines. Let the hardware driver write out the
command and address bytes directly. This gives a peformance
advantage for address bus controlled chips and simplifies the
quirks in the hardware drivers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The previous _ecc removal / cleanup broke (i)nftl module usage.
Export the missing symbol.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Both drivers can not be fixed and compiled due to missing header files.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

MTD clients are agnostic of FLASH which needs ECC suppport.
Remove the functions and fixup the callers.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

These functions were never implemented and added only bloat to
partition and concat code.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

NAND writev(_ecc) support is not longer necessary. Remove it.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Fix the diskonchip ecc setup.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Fix the broken prototype
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

First step of modularizing ECC support.
- Move ECC related functionality into a seperate embedded data structure
- Get rid of the hardware dependend constants to simplify new ECC models
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Seperate functionality out of nand_scan so the code is more
readable. No functional change. First step of simplifying
the nand driver.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The NAND driver used a mix of unsigned char, u_char amd uint8_t
data types. Consolidate to uint8_t usage
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

The writev based write buffer implementation was far to complex as
in most use cases the write buffer had to be handled anyway.
Simplify the write buffer handling and use mtd->write instead.

From extensive testing no performance impact has been noted.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

NDFC NAND Flash controller is embedded in PPC EP44x SoCs.
Add platform driver based support.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Add the data structures necessary to provide platform device support
for NAND
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Replace the chip lock by a the controller lock. For simple drivers a
dummy controller structure is created by the scan code.
This simplifies the locking algorithm in nand_get/release_chip().
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Unrolling the loops produces denser and much faster code.
Add a config switch which allows to select the byte order of the
resulting ecc code. The current Linux implementation has a byte
swap versus the SmartMedia specification
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

We don't need the upper layers to deal with the physical offset. It's
_always_ c->nextblock->offset + c->sector_size - c->nextblock->free_size
so we might as well just let the actual write functions deal with that.
Signed-off-by: NDavid Woodhouse <dwmw2@infradead.org>

o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be
  cleared.
o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for
  STMicro and Intel Sibley flashes with internal ECC.  Those flashes
  disallow clearing of single bits, unlike regular NOR flashes, so the
  new flag models their behaviour better.
o Remove MTD_ECC.  After the STMicro/Sibley merge, this flag is only set
  and never checked.
Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>

In 2002, STMicro started producing NOR flashes with internal ECC protection
for small blocks (8 or 16 bytes).  Support for those flashes was added by me.
In 2005, Intel Sibley flashes copied this strategy and Nico added support for
those.  Merge the code for both.
Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>

At least two flashes exists that have the concept of a minimum write unit,
similar to NAND pages, but no other NAND characteristics.  Therefore, rename
the minimum write unit to "writesize" for all flashes, including NAND.
Signed-off-by: NJoern Engel <joern@wh.fh-wedel.de>