sparc32 uses an additional final link to support btfix.
Introduce a new set of exported variables in the top-level Makefile
to make the extra linking step simpler.

sparc32 has hardcoded knowledge of kallsyms support. This fix
include support for EXTRA_KALLSYM_PASS=1.
The ugly part is that it is hardcoded in the arch/sparc/boot
Makefile.
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
Cc: "David S. Miller" <davem@davemloft.net>
Signed-off-by: NMichal Marek <mmarek@suse.cz>

... implemented that way since the next commit will leave it
almost alone in ext2_fs.h - most of the file (including
struct ext2_super_block) is going to move to fs/ext2/ext2.h.
Signed-off-by: NAl Viro <viro@zeniv.linux.org.uk>

Build failures for the typical configs I use
Signed-off-by: NSam Ravnborg <sam@ravnborg.org>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

linux/bug.h is needed due to an ARRAY_SIZE being used:

arch/arm/mach-clps711x/edb7211-mm.c: In function 'edb7211_map_io':
arch/arm/mach-clps711x/edb7211-mm.c:79:9: error: implicit declaration of function 'BUILD_BUG_ON_ZERO'
Signed-off-by: NOlof Johansson <olof@lixom.net>

This does a sweeping change fixing up all the missing system_misc.h and
system_info.h includes from the system.h split-up change. These were the
ones I came across when building all defconfigs in arch/arm/configs, there
might be more but they lack adequate build coverage to be easily caught.

I'm expecting to get a lot of these piecemeal by each maintainer, so we
might just as well do one sweeping change to get them all at once.

Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Cc: Eric Miao <eric.y.miao@gmail.com>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Wan ZongShun <mcuos.com@gmail.com>
Acked-by: NKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: NOlof Johansson <olof@lixom.net>

The empty asm/cmpxchg.h file that was provided as a temporary build fix
for the asm/system.h disintgration build problem should really include
<asm/intrinsics.h> to make definitions of xchg() and cmpxchg()
available.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NTony Luck <tony.luck@intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NHeiko Carstens <h.carstens@de.ibm.com>
Signed-off-by: NMartin Schwidefsky <schwidefsky@de.ibm.com>

When processor is being hot-added to the system, acpi_map_lsapic invokes
ACPI _MAT method to find APIC ID and flags, verifies that returned structure
is indeed ACPI's local APIC structure, and that flags contain MADT_ENABLED
bit.  Then saves APIC ID, frees structure - and accesses structure when
computing arguments for acpi_register_lapic call.  Which sometime leads
to acpi_register_lapic call being made with second argument zero, failing
to bring processor online with error 'Unable to map lapic to logical cpu
number'.

As lapic->lapic_flags & ACPI_MADT_ENABLED was already confirmed to be non-zero
few lines above, we can just pass unconditional ACPI_MADT_ENABLED to the
acpi_register_lapic.
Signed-off-by: NPetr Vandrovec <petr@vmware.com>
Signed-off-by: NAlok N Kataria <akataria@vmware.com>
Reviewed-by: NToshi Kani <toshi.kani@hp.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

Currently when a CPU is off-lined it enters either MWAIT-based idle or,
if MWAIT is not desired or supported, HLT-based idle (which places the
processor in C1 state). This patch allows processors without MWAIT
support to stay in states deeper than C1.
Signed-off-by: NBoris Ostrovsky <boris.ostrovsky@amd.com>
Signed-off-by: NLen Brown <len.brown@intel.com>

jump_label.c needs asm/cacheflush.h to get flushi().
kgdb_64.c needs asm/cacheflush.h to get flushw_all().
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

Fixes this build error:

kernel/signal.c: In function 'ptrace_stop':
kernel/signal.c:1860:3: error: implicit declaration of function 'synchronize_user_stack' [-Werror=implicit-function-declaration]
Signed-off-by: NStephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: NDavid S. Miller <davem@davemloft.net>

arch/arm/mach-pxa/stargate2.c:155:3: error: unknown field ‘dev’
specified in initializer
arch/arm/mach-pxa/stargate2.c:155:3: warning: initialization from
incompatible pointer type [enabled by default]
arch/arm/mach-pxa/stargate2.c:155:3: warning: (near initialization for
‘stargate2_sensor_3_con[0].dev_name’) [enabled by default]
make[1]: *** [arch/arm/mach-pxa/stargate2.o] Error 1
make: *** [arch/arm/mach-pxa] Error 2

It's caused by 'dev' field removed from struct
regulator_consumer_supply.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

arch/arm/mach-pxa/cm-x300.c:716:3: error: unknown field ‘dev’ specified
in initializer
make[1]: *** [arch/arm/mach-pxa/cm-x300.o] Error 1
make: *** [arch/arm/mach-pxa] Error 2

It's caused by 'dev' field removed from struct
regulator_consumer_supply.
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

Commit 737f360d

"regulator: Remove support for supplies specified by struct device"

caused this file to break, since it was still relying on the
device field to be present.  Map it onto dev_name appropriately

Since there are two consumers with the name "reg-userspace-consumer",
we have to supply the ID as a suffix in the REGULATOR_CONSUMER calls.
Signed-off-by: NPaul Gortmaker <paul.gortmaker@windriver.com>
CC: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NHaojian Zhuang <haojian.zhuang@gmail.com>

Fix this build error on ia64:

  In file included from include/linux/sched.h:92,
                  from arch/ia64/kernel/asm-offsets.c:9:
  include/linux/llist.h:59:25: error: asm/cmpxchg.h: No such file or directory
  make[1]: *** [arch/ia64/kernel/asm-offsets.s] Error 1

Right now we don't seem to need any actual contents for the
asm/cmpxchg.h to make the build work ...  so leave the migration of
xchg() and cmpxchg() to this new header file for a future patch.

Also process.c needs <asm/switch_to.h> (for definition of pfm_syst_info).
Signed-off-by: NTony Luck <tony.luck@intel.com>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

The debugfs code is really generic for all platforms.  This patch removes the
powerpc-specific directory reference and makes it available to all
architectures.
Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>

During a complex merge for v3.4, one line of the commit
c20b909b ("ARM: LPC32xx: Ethernet support") was
reverted wrongly ("lpc-eth.0" -> "lpc-net.0") while the other conflicts were
merged correctly. This patch re-applies the clock name "lpc-eth.0".
Signed-off-by: NRoland Stigge <stigge@antcom.de>
Signed-off-by: NOlof Johansson <olof@lixom.net>

Fix the compilation break observed on latest mainline caused
by 9f97da78 (Disintegrate asm/system.h for ARM):

arch/arm/mach-omap1/pm.c: In function 'omap_pm_prepare':
arch/arm/mach-omap1/pm.c:587: error: implicit declaration of function 'disable_hlt'
arch/arm/mach-omap1/pm.c: In function 'omap_pm_finish':
arch/arm/mach-omap1/pm.c:624: error: implicit declaration of function 'enable_hlt'
arch/arm/mach-omap1/pm.c: In function 'omap_pm_init':
arch/arm/mach-omap1/pm.c:681: error: 'arm_pm_idle' undeclared (first use in this function)
...

arch/arm/mach-omap2/pm.c: In function 'omap_pm_begin':
arch/arm/mach-omap2/pm.c:239: error: implicit declaration of function 'disable_hlt'
arch/arm/mach-omap2/pm.c: In function 'omap_pm_end':
arch/arm/mach-omap2/pm.c:247: error: implicit declaration of function 'enable_hlt'
Signed-off-by: NGovindraj.R <govindraj.raja@ti.com>
Acked-by: NKevin Hilman <khilman@ti.com>
[tony@atomide.com: updated to fix omap1 too]
Signed-off-by: NTony Lindgren <tony@atomide.com>

Since all references to OMAP_GPIO_IRQ macro are replaced now
with gpio_to_irq(), this can be removed altogether.
Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com>
Signed-off-by: NTony Lindgren <tony@atomide.com>

The following commits change gpio-omap to use dynamic
IRQ allocation:

25db711d gpio/omap: Fix IRQ handling for SPARSE_IRQ
384ebe1c gpio/omap: Add DT support to GPIO driver

With dynamic allocation of IRQ the usage of OMAP_GPIO_IRQ
is no longer valid. We must be using gpio_to_irq() instead.
Signed-off-by: NTarun Kanti DebBarma <tarun.kanti@ti.com>
[tony@atomide.com: updated comments]
Signed-off-by: NTony Lindgren <tony@atomide.com>

This adopts a trimmed down version of the MIPS port mangling interface
limited to the I/O swabbing for platforms that can't use little endian
accessors. For platforms with mixed I/O spaces involving PCI it will
still be necessary to enable byte swapping at the host controller level.
Attention needs to be paid to all of host controller endianness, CPU
endianness, and whether I/O accesses are explicitly swapped or not via
SWAP_IO_SPACE. Fortunately the platforms that need this are in the
minority.
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

crashkernel reservation need know the total memory size.  Current
get_total_mem simply use max_pfn - min_low_pfn.  It is wrong because it
will including memory holes in the middle.

Especially for kvm guest with memory > 0xe0000000, there's below in qemu
code: qemu split memory as below:

    if (ram_size >= 0xe0000000 ) {
        above_4g_mem_size = ram_size - 0xe0000000;
        below_4g_mem_size = 0xe0000000;
    } else {
        below_4g_mem_size = ram_size;
    }

So for 4G mem guest, seabios will insert a 512M usable region beyond of
4G.  Thus in above case max_pfn - min_low_pfn will be more than original
memsize.

Fixing this issue by using memblock_phys_mem_size() to get the total
memsize.
Signed-off-by: NDave Young <dyoung@redhat.com>
Reviewed-by: NWANG Cong <xiyou.wangcong@gmail.com>
Reviewed-by: NSimon Horman <horms@verge.net.au>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

This was marked as obsolete for quite a while now..  Now it is time to
remove it altogether.  And while doing this, get rid of first_cpu() as
well.  Also, remove the redundant setting of cpu_online_mask in
smp_prepare_cpus() because the generic code would have already set cpu 0
in cpu_online_mask.
Reported-by: NTony Luck <tony.luck@intel.com>
Signed-off-by: NSrivatsa S. Bhat <srivatsa.bhat@linux.vnet.ibm.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

We have lots of infrastructure in place to partition multi-core systems
such that we have a group of CPUs that are dedicated to specific task:
cgroups, scheduler and interrupt affinity, and cpuisol= boot parameter.
Still, kernel code will at times interrupt all CPUs in the system via IPIs
for various needs.  These IPIs are useful and cannot be avoided
altogether, but in certain cases it is possible to interrupt only specific
CPUs that have useful work to do and not the entire system.

This patch set, inspired by discussions with Peter Zijlstra and Frederic
Weisbecker when testing the nohz task patch set, is a first stab at trying
to explore doing this by locating the places where such global IPI calls
are being made and turning the global IPI into an IPI for a specific group
of CPUs.  The purpose of the patch set is to get feedback if this is the
right way to go for dealing with this issue and indeed, if the issue is
even worth dealing with at all.  Based on the feedback from this patch set
I plan to offer further patches that address similar issue in other code
paths.

This patch creates an on_each_cpu_mask() and on_each_cpu_cond()
infrastructure API (the former derived from existing arch specific
versions in Tile and Arm) and uses them to turn several global IPI
invocation to per CPU group invocations.

Core kernel:

on_each_cpu_mask() calls a function on processors specified by cpumask,
which may or may not include the local processor.

You must not call this function with disabled interrupts or from a
hardware interrupt handler or from a bottom half handler.

arch/arm:

Note that the generic version is a little different then the Arm one:

1. It has the mask as first parameter
2. It calls the function on the calling CPU with interrupts disabled,
   but this should be OK since the function is called on the other CPUs
   with interrupts disabled anyway.

arch/tile:

The API is the same as the tile private one, but the generic version
also calls the function on the with interrupts disabled in UP case

This is OK since the function is called on the other CPUs
with interrupts disabled.
Signed-off-by: NGilad Ben-Yossef <gilad@benyossef.com>
Reviewed-by: NChristoph Lameter <cl@linux.com>
Acked-by: NChris Metcalf <cmetcalf@tilera.com>
Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Frederic Weisbecker <fweisbec@gmail.com>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Pekka Enberg <penberg@kernel.org>
Cc: Matt Mackall <mpm@selenic.com>
Cc: Rik van Riel <riel@redhat.com>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Sasha Levin <levinsasha928@gmail.com>
Cc: Mel Gorman <mel@csn.ul.ie>
Cc: Alexander Viro <viro@zeniv.linux.org.uk>
Cc: Avi Kivity <avi@redhat.com>
Acked-by: NMichal Nazarewicz <mina86@mina86.org>
Cc: Kosaki Motohiro <kosaki.motohiro@gmail.com>
Cc: Milton Miller <miltonm@bga.com>
Cc: Russell King <linux@arm.linux.org.uk>
Acked-by: NPeter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>

As described in e6fa16ab ("signal: sigprocmask() should do
retarget_shared_pending()") the modification of current->blocked is
incorrect as we need to check whether the signal we're about to block is
pending in the shared queue.

Also, use the new helper function introduced in commit 5e6292c0
("signal: add block_sigmask() for adding sigmask to current->blocked")
which centralises the code for updating current->blocked after
successfully delivering a signal and reduces the amount of duplicate code
across architectures.  In the past some architectures got this code wrong,
so using this helper function should stop that from happening again.
Acked-by: NOleg Nesterov <oleg@redhat.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

get_signal_to_deliver() already resets the signal handler if SA_ONESHOT is
set in ka->sa.sa_flags, there's no need to do it again in handle_signal().
 Furthermore, because we were modifying ka->sa.sa_handler (which is a copy
of sighand->action[]) instead of sighand->action[] the original code had
no effect on signal delivery.
Acked-by: NOleg Nesterov <oleg@redhat.com>
Cc: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: NMatt Fleming <matt.fleming@intel.com>
Signed-off-by: NAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: NPaul Mundt <lethal@linux-sh.org>

Add information about LVT offset assignments to better debug firmware
bugs related to this. See following examples.

 # dmesg | grep -i 'offset\|ibs'
 LVT offset 0 assigned for vector 0xf9
 [Firmware Bug]: cpu 0, try to use APIC500 (LVT offset 0) for vector 0x10400, but the register is already in use for vector 0xf9 on another cpu
 [Firmware Bug]: cpu 0, IBS interrupt offset 0 not available (MSRC001103A=0x0000000000000100)
 Failed to setup IBS, -22

In this case the BIOS assigns both offsets for MCE (0xf9) and IBS
(0x400) vectors to offset 0, which is why the second APIC setup (IBS)
failed.

With correct setup you get:

 # dmesg | grep -i 'offset\|ibs'
 LVT offset 0 assigned for vector 0xf9
 LVT offset 1 assigned for vector 0x400
 IBS: LVT offset 1 assigned
 perf: AMD IBS detected (0x00000007)
 oprofile: AMD IBS detected (0x00000007)

Note: The vector includes also the message type to handle also NMIs
(0x400). In the firmware bug message the format is the same as of the
APIC500 register and includes the mask bit (bit 16) in addition.
Signed-off-by: NRobert Richter <robert.richter@amd.com>
Signed-off-by: NIngo Molnar <mingo@kernel.org>

Delete all instances of asm/system.h as they should be redundant by this
point.
Signed-off-by: NDavid Howells <dhowells@redhat.com>

Remove all #inclusions of asm/system.h preparatory to splitting and killing
it.  Performed with the following command:

perl -p -i -e 's!^#\s*include\s*<asm/system[.]h>.*\n!!' `grep -Irl '^#\s*include\s*<asm/system[.]h>' *`
Signed-off-by: NDavid Howells <dhowells@redhat.com>

Move all declarations of free_initmem() to linux/mm.h so that there's only one
and it's used by everything.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: linux-c6x-dev@linux-c6x.org
cc: microblaze-uclinux@itee.uq.edu.au
cc: linux-sh@vger.kernel.org
cc: sparclinux@vger.kernel.org
cc: x86@kernel.org
cc: linux-mm@kvack.org

Disintegrate asm/system.h for OpenRISC.  Not compiled.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NArnd Bergmann <arnd@arndb.de>
cc: linux@lists.openrisc.net

Disintegrate asm/system.h for Xtensa.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: Chris Zankel <chris@zankel.net>

Disintegrate asm/system.h for Unicore32. (Compilation successful)
The implementation details are not changed, but only splitted.
BTW, some codestyles are adjusted.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Signed-off-by: NGuan Xuetao <gxt@mprc.pku.edu.cn>

Disintegrate asm/system.h for Tile.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NChris Metcalf <cmetcalf@tilera.com>

Disintegrate asm/system.h for Sparc.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: sparclinux@vger.kernel.org

Disintegrate asm/system.h for SH.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: linux-sh@vger.kernel.org

Disintegrate asm/system.h for Score.  Not compiled.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: Chen Liqin <liqin.chen@sunplusct.com>

Disintegrate asm/system.h for S390.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
cc: linux-s390@vger.kernel.org

Disintegrate asm/system.h for PowerPC.
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
cc: linuxppc-dev@lists.ozlabs.org