Implement an irq_set_type callback for the GIC which is used to set
the polarity and trigger type of GIC interrupts.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Reviewed-by: NQais Yousef <qais.yousef@imgtec.com>
Tested-by: NQais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7810/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There's no need for platforms to have their own GIC irq_ack/irq_eoi
callbacks.  irq_ack need only clear the GIC's edge detector on
edge-triggered interrupts and there's no need at all for irq_eoi.
Also get rid of the mask_ack callback since it's not necessary either.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Reviewed-by: NQais Yousef <qais.yousef@imgtec.com>
Tested-by: NQais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7809/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Move GIC irqchip support to drivers/irqchip/ and rename the Kconfig
option from IRQ_GIC to MIPS_GIC to avoid confusion with the ARM GIC.
Signed-off-by: NAndrew Bresticker <abrestic@chromium.org>
Acked-by: NJason Cooper <jason@lakedaemon.net>
Reviewed-by: NQais Yousef <qais.yousef@imgtec.com>
Tested-by: NQais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7812/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Based on the spatch

@@
expression e;
@@
- return (e);
+ return e;

with heavy hand editing because some of the changes are either whitespace
or identation only or result in excessivly long lines.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Move most of the functionality of gic_get_int() into a new function
gic_get_int_mask() which takes a bitmask of interrupts in which the
caller is interested, and returns the subset which are pending for the
current CPU.

This allows CP0 IRQ dispatch routines to check only the GIC interrupts
which are routed to a particular CPU interrupt input.

gic_get_int() is reimplemented using gic_get_int_mask() and is retained
for use by any platforms for which gic_get_int() is sufficient.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7376/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

A GIC interrupt which is declared as having a GIC_MAP_TO_NMI_MSK
mapping causes the cpu parameter to gic_setup_intr() to be increased
to 32, causing memory corruption when pcpu_masks[] is written to again
later in the function.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7375/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

irq-gic.c:gic_get_int() masks out interrupts from the pending set which
aren’t in the pcpu_mask. Only interrupts marked with GIC_FLAG_IPI were
set in pcpu_mask, meaning that peripheral interrupts also had to be
marked as IPIs. Remove the use of GIC_FLAG_IPI and allow the flags
member of struct gic_intr_map to be zero.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7374/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Several bitmaps are declared in arch/mips/include/asm/gic.h, but the
scope of their use is limited to arch/mips/kernel/irq-gic.c. Move the
declarations from the header file to the C file.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7372/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

A GIC interrupt which is declared as having a GIC_MAP_TO_NMI_MSK
mapping causes the cpu parameter to gic_setup_intr() to be increased
to 32, causing memory corruption when pcpu_masks[] is written to again
later in the function.
Signed-off-by: NJeffrey Deans <jeffrey.deans@imgtec.com>
Signed-off-by: NMarkos Chandras <markos.chandras@imgtec.com>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/7375/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch allows the GIC clockevent device for a CPU to be configured
by another CPU. This makes GIC clockevent devices suitable for use as
the tick broadcast device, where formerly the GIC timer local to the
configuring CPU would have been configured incorrectly.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>

This header was used only by Malta but is used no longer. Remove it. It
was also included unnecessarily in irq-gic.c, so that include is also
removed.
Signed-off-by: NPaul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6366/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

There is an infinite loop in gic_set_affinity. When irq_set_affinity
gets called on gic controller, it blocks forever.
Signed-off-by: NTony Wu <tung7970@gmail.com>
Cc: Steven J. Hill <Steven.Hill@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5537/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add new clockevent driver that uses the counter present on the MIPS
Global Interrupt Controller.
Signed-off-by: NRaghu Gandham <Raghu.Gandham@imgtec.com>
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Reorganize some of the GIC clocksource driver code. Below is a list of
the various changes.

  * No longer select CSRC_GIC by default for Malta platform.
  * Limit choice for either the GIC or R4K clocksource, not both.
  * Change location in Makefile.
  * Created new 'gic_read_count' function in common 'irq-gic.c' file.
  * Change 'git_hpt_read' function in 'csrc-gic.c' to use new function.
  * Surround GIC specific code in Malta platform code with #ifdef's.
  * Only initialize the GIC clocksource if it was selected. Original
    code called it unconditionally if a GIC was found.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Move the global variable 'gic_frequency' to be defined in the file
'arch/mips/kernel/irq-gic.c' instead of defining it individually
for each platform making use of the GIC. Also change the type to
be an unsigned integer instead of signed.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

Move the global variable 'gic_present' to be defined in the file
'arch/mips/kernel/irq-gic.c' instead of defining it individually
for each platform making use of the GIC. Also change the type to
be an unsigned integer instead of signed.
Signed-off-by: NSteven J. Hill <Steven.Hill@imgtec.com>

When dealing with multiple VPEs, the count needs to be one-based
for correct initialization of the GIC.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

Each platform should define its own 'gic_finish_irq' function.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

Add support to use an external interrupt controller with the GIC.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

Fix whitespace, beautify the code and remove debug statements.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

The GIC interrupt code is used by multiple platforms and the
current code was half Malta dependent code. These changes
abstract away the platform specific differences.
Signed-off-by: NSteven J. Hill <sjhill@mips.com>

Scripted with coccinelle.
Signed-off-by: NThomas Gleixner <tglx@linutronix.de>

Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2186/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Add missing #inclusions of <linux/irq.h> to a whole bunch of files that should
really include it.  Note that this can replace #inclusions of <asm/irq.h>.

This is required for the patch to sort out irqflags handling function naming to
compile on MIPS.

The problem is that these files require access to things like setup_irq() -
which isn't available by #including <linux/interrupt.h>
Signed-off-by: NDavid Howells <dhowells@redhat.com>
Acked-by: NRalf Baechle <ralf@linux-mips.org>

These would result in KERN_<level> actually getting printed.
Signed-off-by: NJoe Perches <joe@perches.com>
To: Jiri Kosina <trivial@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/1581/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This prevents the GIC code from being reusable sanely.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This takes the current IPI interrupt assignment from the fix number of 4
to the number of CPUs defined in the system.
Signed-off-by: NTim Anderson <tanderson@mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

This patch extends the GIC interrupt handling beyond the current 32 bit
range as well as extending the number of interrupts based on the number
of CPUs.
Signed-off-by: NTim Anderson <tanderson@mvista.com>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

Some of the were relying into smp.h being dragged in by another header
which of course is fragile.  <asm/cpu-info.h> uses smp_processor_id()
only in macros and including smp.h there leads to an include loop, so
don't change cpu-info.h.
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>

according to Ingo, change set_affinity() in irq_chip should return int,
because that way we can handle failure cases in a much cleaner way, in
the genirq layer.

v2: fix two typos

[ Impact: extend API ]
Signed-off-by: NYinghai Lu <yinghai@kernel.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Suresh Siddha <suresh.b.siddha@intel.com>
Cc: "Eric W. Biederman" <ebiederm@xmission.com>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: linux-arch@vger.kernel.org
LKML-Reference: <49F654E9.4070809@kernel.org>
Signed-off-by: NIngo Molnar <mingo@elte.hu>

Impact: cleanup, update to new cpumask API

Irq_desc.affinity and irq_desc.pending_mask are now cpumask_var_t's
so access to them should be using the new cpumask API.
Signed-off-by: NMike Travis <travis@sgi.com>

Impact: change existing irq_chip API

Not much point with gentle transition here: the struct irq_chip's
setaffinity method signature needs to change.

Fortunately, not widely used code, but hits a few architectures.

Note: In irq_select_affinity() I save a temporary in by mangling
irq_desc[irq].affinity directly.  Ingo, does this break anything?

(Folded in fix from KOSAKI Motohiro)
Signed-off-by: NRusty Russell <rusty@rustcorp.com.au>
Signed-off-by: NMike Travis <travis@sgi.com>
Reviewed-by: NGrant Grundler <grundler@parisc-linux.org>
Acked-by: NIngo Molnar <mingo@redhat.com>
Cc: ralf@linux-mips.org
Cc: grundler@parisc-linux.org
Cc: jeremy@xensource.com
Cc: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>

Signed-off-by: NChris Dearman <chris@mips.com>
Signed-off-by: NAtsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: NRalf Baechle <ralf@linux-mips.org>