- 15 10月, 2012 11 次提交
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由 Afzal Mohammed 提交于
Requirement of gpmc header outside of mach-omap2 has been cutoff, move gpmc header file in plat-omap folder to local mach-omap2 folder Objective - common zImage participation of omap Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
nand driver handles gpmc-nand block fully, hence no more users for these exported nand functions, remove it. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Update helper function that provides gpmc-nand register details for nand driver with bch register information. Using this nand driver can be made self sufficient to handle remaining gpmc-nand operations by itself instead of relying on gpmc exported nand functions. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Capability of bch schemes could be discovered using soc revision checks. If soc revision indicates that selected ecc scheme is not supported bail out. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
For common arm zImage existing nand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Also move gpmc-nand platform data to platform header meant for nand from gpmc header file Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
For common arm zImage existing onenand header file in platform specific location was moved to generic platform data location, but it contained more than platform data, remove it. New local header has been created for exposing functions. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
onenand driver needs to know whether soc is falling under 34xx family to properly handle onenand. But driver is not supposed to do cpu_is_* check, hence educate platform data with this information. Driver can make use of it to avoid cpu_is_* check. Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Divider value for a certain sync clk is determined solely based on gpmc fclk. CS# does not have any role here, thus remove presence of CS# in clock divider calculation API. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com>
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由 Jon Hunter 提交于
A platform function pointer for getting the frequency of a OneNAND device was added so that a platform could specify a custom function for returning the frequency and not just rely on the OneNAND version to determine the frequency. However, this platform function pointer is not currently being used and I am not sure if it ever has. OneNAND devices are not so common these days and as far as I know not being used with new devices. Therefore, it is most likely that this get_freq() function pointer will not be used and so remove it. Given that the get_freq() function pointer is not used, neither is the clk_dep variable and so all references to it can also be removed. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com>
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由 Afzal Mohammed 提交于
Refactor set_async_mode & set_sync_mode functions to separate out timing calculation & actual configuration (GPMC & OneNAND side). Thanks to Jon for his suggestions. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com>
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由 Afzal Mohammed 提交于
Helper function for updating nand platform data has been added the capability to take timing structure arguement. Usage of omap_nand_flash_init() has been replaced by modifed one, omap_nand_flash_init was doing things similar to board_nand_init except that NAND CS# were being acquired based on bootloader setting. As CS# is hardwired for a given board, acquiring gpmc CS# has been removed, and updated with the value on board. NAND CS# used in beagle board & omap3evm was found to be CS0. Thomas Weber <thomas.weber.linux@googlemail.com> reported that value of devkit8000 to be CS0. Overo board was found to be using CS0 based on u-boot, while google grep says omap3touchbook too has CS0. Signed-off-by: NAfzal Mohammed <afzal@ti.com> Reviewed-by: NJon Hunter <jon-hunter@ti.com> Acked-by: NIgor Grinberg <grinberg@compulab.co.il>
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- 14 10月, 2012 1 次提交
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由 Russell King 提交于
As suggested by Andrew Morton: This is a pet peeve of mine. Any time there's a long list of items (header file inclusions, kconfig entries, array initalisers, etc) and someone wants to add a new item, they *always* go and stick it at the end of the list. Guys, don't do this. Either put the new item into a randomly-chosen position or, probably better, alphanumerically sort the list. lets sort all our select statements alphanumerically. This commit was created by the following perl: while (<>) { while (/\\\s*$/) { $_ .= <>; } undef %selects if /^\s*config\s+/; if (/^\s+select\s+(\w+).*/) { if (defined($selects{$1})) { if ($selects{$1} eq $_) { print STDERR "Warning: removing duplicated $1 entry\n"; } else { print STDERR "Error: $1 differently selected\n". "\tOld: $selects{$1}\n". "\tNew: $_\n"; exit 1; } } $selects{$1} = $_; next; } if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or /^endif/ or /^endchoice/)) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } undef %selects; } print; } if (%selects) { foreach $k (sort (keys %selects)) { print "$selects{$k}"; } } It found two duplicates: Warning: removing duplicated S5P_SETUP_MIPIPHY entry Warning: removing duplicated HARDIRQS_SW_RESEND entry and they are identical duplicates, hence the shrinkage in the diffstat of two lines. We have four testers reporting success of this change (Tony, Stephen, Linus and Sekhar.) Acked-by: NJason Cooper <jason@lakedaemon.net> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 10月, 2012 15 次提交
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由 Paul Walmsley 提交于
Commit eb05f691 ("ARM: OMAP: hwmod: partially un-reset hwmods might not be properly enabled") added code to skip the IP block disable sequence if all of the block's hardreset lines weren't asserted. But this did not handle the case when no hardreset lines were associated with a module, which is the general case. In that situation, the IP block disable would be skipped. This is likely to cause PM regressions. So, modify _omap4_disable_module() and _am33xx_disable_module() to only bail out early if there are any hardreset lines asserted. And move the AM33xx test above the actual module disable code to ensure that the behavior is consistent. Reported-by: NArchit Taneja <a0393947@ti.com> Tested-by: Archit Taneja <a0393947@ti.com> # DSS Cc: Omar Ramirez Luna <omar.luna@linaro.org> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Acked-by: NVaibhav Hiremath <hvaibhav@ti.com> Tested-by: Vaibhav Hiremath <hvaibhav@ti.com> # AM335x Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
Commit b71c7217 (ARM: OMAP2+: clockdomain/hwmod: add workaround for EMU clockdomain idle problems) added a workaround for the EMU clock domain on OMAP3/4 devices to prevent the clock domain for transitioning while it is in use. In the proposed patch [1] code was added to the omap3xxx_clkdm_clk_enable() and omap3xxx_clkdm_clk_disable() functions to check for the flag CLKDM_MISSING_IDLE_REPORTING and perform the appropriate action. However, in the merged patch it appears that this code was added to the omap2_clkdm_clk_enable() and omap2_clkdm_clk_disable() functions by mistake. [1] http://marc.info/?l=linux-arm-kernel&m=134383567112518&w=2Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vikram Narayanan 提交于
Use the enum for board_ref_clock from linux/wl12xx.h Signed-off-by: NVikram Narayanan <vikram186@gmail.com> Cc: linux-omap@vger.kernel.org Reviewed-by: Pankaj Jangra<jangra.pankaj9@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wei Yongjun 提交于
Remove duplicated include. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Senna Tschudin 提交于
Found by http://coccinelle.lip6.fr/Signed-off-by: NPeter Senna Tschudin <peter.senna@gmail.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
u-boot stopped configuring 'non essential' pins recently. These pins are essential for audio and need to be done to have working audio on the board. Pin Mux configuration for: twl6040 audpwron gpio, McPDM, and McBSP1. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Peter Ujfalusi 提交于
u-boot stopped configuring 'non essential' pins recently. These pins are essential for audio and need to be done to have working audio on the board. Pin Mux configuration for: twl6040 audpwron gpio, McPDM, DMIC, McBSP1 and McBSP2. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Raphael Assenat 提交于
This patch adds a missing hwmod entry for the HDQ/1-Wire module present in the AM3505/17 CPUs. This restores 1-Wire support to our AM3505 boards. We think it probably stopped working with commit 96b1b29d ARM: OMAP2+: HDQ1W: use omap_device Signed-off-by: NRaphael Assenat <raph@8d.com> Acked-by: NPaul Walmsley <paul@pwsan.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Afzal Mohammed 提交于
compiler complained, `gpmc_remove' referenced in section `.data' of arch/arm/mach-omap2/built-in.o: defined in discarded section `.exit.text' of arch/arm/mach-omap2/built-in.o Annotate gpmc_remove function and dependents with __devexit. Reported-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NAfzal Mohammed <afzal@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wei Yongjun 提交于
In case of error, the function clk_get() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wei Yongjun 提交于
In case of error, the function omap_device_alloc() returns ERR_PTR() not NULL pointer. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generated this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Wei Yongjun 提交于
In case of error, the function omap_device_alloc() returns ERR_PTR() not NULL pointer. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generated this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kevin Hilman 提交于
Currently, a dummy omap_device is created for the MPU sub-system so that a device node exists for MPU DVFS. Specifically, for the association of MPU OPPs to a device node, and so that a voltage regulator can be mapped to a device node. For drivers to get a handle to this device node, an OMAP-specific API has been used. However, the kernel already has device nodes for the CPU(s) in the system, so we can use those instead of an OMAP-specific dummy device and then drivers (like OMAP CPUfreq) can use generic APIs. To use the existing CPU device nodes, modify the OPP creation and regulator registration to use the CPU0 device node for registraion. NOTE: this patch always uses CPU0 as the device node. On all OMAPs today, MPU DVFS scales all CPUs together, so this will not be a problem, but this assumption will need to be changed if independently scalable CPUs are introduced. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Shubhrajyoti D 提交于
rx51_si4713_dev is referenced only from rx51_init_si4713. So the memory for rx51_si4713_dev can be safely freed after init. Also it references rx51_si4713_board_info which is __initdata_or_module. fixes the below warning. WARNING: vmlinux.o(.data+0x30958): Section mismatch in reference from the variable rx51_si4713_dev to the (unknown reference) .init.data:(unknown) The variable rx51_si4713_dev references the (unknown reference) __initdata (unknown) If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Reported-by: NWolfram Sang <w.sang@pengutronix.de> Signed-off-by: NShubhrajyoti D <shubhrajyoti@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 R Sricharan 提交于
memblock_steal tries to reserve physical memory during boot. When the requested size is not aligned on the section size then, the remaining memory available for lowmem becomes unaligned on the section boundary. There is a issue with this, which is discussed in the thread below. https://lkml.org/lkml/2012/6/28/112 The final conclusion from the thread seems to be align the memblock_steal calls on the SECTION boundary. The issue comes out when LPAE is enabled, where the section size is 2MB. Boot tested this on OMAP5 evm with and without LPAE. Signed-off-by: NR Sricharan <r.sricharan@ti.com> Acked-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 10月, 2012 3 次提交
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由 Paul Walmsley 提交于
Commit e54adb1e ("ARM: OMAP: omap3evm: cleanup revision bits") adds a new sparse[1] warning: arch/arm/mach-omap2/board-omap3evm.c:90:4: warning: symbol 'get_omap3_evm_rev' was not declared. Should it be static? This symbol no longer appears to be used outside this file, so mark it static and remove the export. ... 1. https://sparse.wiki.kernel.org/index.php/Main_PageSigned-off-by: NPaul Walmsley <paul@pwsan.com> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Tony Lindgren <tony@atomide.com>
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由 Jon Hunter 提交于
Commit 7d7e1eba (ARM: OMAP2+: Prepare for irqs.h removal) and commit ec2c0825 (ARM: OMAP2+: Remove hardcoded IRQs and enable SPARSE_IRQ) updated the way interrupts for OMAP2/3 devices are defined in the HWMOD data structures to being an index plus a fixed offset (defined by OMAP_INTC_START). The definition of the PMU interrupts on OMAP2/3 devices is missing the OMAP_INTC_START offset and so this is causing the allocation of PMU interrupts to fail on OMAP2/3 devices. So add the offset to fix this. This is patch is based upon Tony's master branch for OMAP. Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Vaibhav Hiremath 提交于
After Rajendra's common-clock preparation series, commit (a1978ef4da1 - ARM: omap: hwmod: get rid of all omap_clk_get_by_name usage) the clkdev table need to update with an entry for clocks used by hwmod to have clock name same as the alias. Without this, the clk_get() in omap_hwmod would fail. Signed-off-by: NVaibhav Hiremath <hvaibhav@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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- 06 10月, 2012 1 次提交
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由 Andi Kleen 提交于
Signed-off-by: NAndi Kleen <ak@linux.intel.com> Cc: Russell King <rmk@arm.linux.org.uk> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 03 10月, 2012 3 次提交
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由 Wei Yongjun 提交于
In case of error, the function voltdm_lookup() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NJean Pihet <j-pihet@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Wei Yongjun 提交于
In case of error, the function voltdm_lookup() returns NULL not ERR_PTR(). The IS_ERR() test in the return value check should be replaced with NULL test. dpatch engine is used to auto generate this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: NJean Pihet <j-pihet@ti.com> Signed-off-by: NKevin Hilman <khilman@ti.com>
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由 Wei Yongjun 提交于
In case of error, the function omap_device_get_by_hwmod_name() returns ERR_PTR() not NULL pointer. The NULL test in the return value check should be replaced with IS_ERR(). dpatch engine is used to auto generated this patch. (https://github.com/weiyj/dpatch) Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NKevin Hilman <khilman@ti.com>
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- 25 9月, 2012 1 次提交
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由 Peter Ujfalusi 提交于
On OMAP4 the i2c1 bus is dedicated for the PMIC and audio related devices. Manufacturers can opt to use different codec than twl6040 and also can add audio related IC to the bus (external amplifier for example on SDP4430). Make it possible to add different set of additional devices to i2c1 bus on OMAP4 boards. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> [tony@atomide.com: updated for removal of irqs.h] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 9月, 2012 5 次提交
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由 Jon Hunter 提交于
OMAP4460 and OMAP4470 devices have dedicated PMU interrupts and so add these interrupts to the MPU HWMOD so we can use these for PMU events on these devices. The PMU interrupts need to be the first interrupts in the array of interrupts as the ARM PMU driver assumes this. By using these dedicated interrupts we only need to enable the MPU and DEBUG sub-systems for PMU to work. This is different to OMAP4430 that did not have dedicated interrupts and required other power domains in addition to the DEBUG sub-system to be enabled so we could route the PMU events to the CTI interrupts. Hence, OMAP4460 and OMAP4470 devices can use the same list of HWMODs to create the PMU device that is using by OMAP3. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
The original implementation of this patch was done by Ming Lei for PMU on OMAP4 [1]. Since then the PM runtime calls have been moved into the ARM PMU code and this greatly simplifies the changes. The another differnce since the original version, is that it is no longer necessary to call pm_runtime_get/put during the PMU initialisation was we are no longer accessing the hardware at this stage. By adding runtime PM support, we can ensure that the appropriate power and clock domains are kept on while PMU is being used. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2011-November/074153.html Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Ming Lei 提交于
For OMAP4430 PMU events are routed to the CPU via the cross trigger interface (CTI) because there are no dedicated interrupts. In order to route the PMU events via the CTI IRQs, the following modules must be enabled: l3_instr, l3_main_3, debugss Therefore, build the arm-pmu device via these three HWMODs. However, the CTI support for this platform still needs some work. Until that's finished, temporarily disable the PMU on OMAP4430. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NMing Lei <ming.lei@canonical.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: temporarily disabled OMAP4430 PMU support until a better CTI interface can be implemented; added patch description note] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
Convert OMAP2/3 devices to use HWMOD for creating a PMU device. To support PMU on OMAP2 devices we only need to use MPU sub-system and so we can simply use the MPU HWMOD to create the PMU device. To support PMU on OMAP3 devices, we need to use the MPU and DEBUG sub-systems and so use these HWMODs to create the PMU device for OMAP3. The MPU HWMOD for OMAP2/3 devices is currently missing the PMU interrupt and so add the PMU interrupt to the MPU HWMOD for these devices. This change also moves the PMU code out of the mach-omap2/devices.c files into its own pmu.c file as suggested by Kevin Hilman to de-clutter devices.c. Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: fixed checkpatch messages; updated to apply; dropped old-style initial filename line in header comments] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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由 Jon Hunter 提交于
To enable PMU with runtime PM support on OMAP3 devices we need to be able to dynamically enable and disable the debug sub-system at runtime. By adding HWMOD data for the debug sub-system for OMAP3, we can build the PMU device using the debug sub-system HWMOD and control this power domain using runtime PM. Reviewed-by: NBenoit Cousson <b-cousson@ti.com> Signed-off-by: NJon Hunter <jon-hunter@ti.com> [paul@pwsan.com: updated to apply; added L4-EMU address space] Signed-off-by: NPaul Walmsley <paul@pwsan.com>
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