1. 02 7月, 2014 1 次提交
    • P
      clk: Add driver for Palmas clk32kg and clk32kgaudio clocks · 942d1d67
      Peter Ujfalusi 提交于
      Palmas class of devices can provide 32K clock(s) to be used by other devices
      on the board. Depending on the actual device the provided clocks can be:
      CLK32K_KG and CLK32K_KGAUDIO
      or only one:
      CLK32K_KG (TPS659039 for example)
      
      Use separate compatible flags for the two 32K clock.
      A system which needs or have only one of the 32k clock from
      Palmas will need to add node(s) for each clock as separate section
      in the dts file.
      The two compatible property is:
      "ti,palmas-clk32kg" for clk32kg clock
      "ti,palmas-clk32kgaudio" for clk32kgaudio clock
      
      Apart from the register control of the clocks - which is done via
      the clock API there is a posibility to enable the external sleep
      control. In this way the clock can be enabled/disabled on demand by the
      user of the clock.
      
      See the documentation for more details.
      Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com>
      Reviewed-by: NNishanth Menon <nm@ti.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      942d1d67
  2. 24 5月, 2014 1 次提交
  3. 16 5月, 2014 1 次提交
  4. 15 5月, 2014 1 次提交
  5. 19 3月, 2014 1 次提交
  6. 25 2月, 2014 1 次提交
    • A
      clk: bcm281xx: add initial clock framework support · 1f27f152
      Alex Elder 提交于
      Add code for device tree support of clocks in the BCM281xx family of
      SoCs.  Machines in this family use peripheral clocks implemented by
      "Kona" clock control units (CCUs).  (Other Broadcom SoC families use
      Kona style CCUs as well, but support for them is not yet upstream.)
      
      A BCM281xx SoC has multiple CCUs, each of which manages a set of
      clocks on the SoC.  A Kona peripheral clock is composite clock that
      may include a gate, a parent clock multiplexor, and zero, one
      or two dividers.  There is a variety of gate types, and many gates
      implement hardware-managed gating (often called "auto-gating").
      Most dividers divide their input clock signal by an integer value
      (one or more).  There are also "fractional" dividers which allow
      division by non-integer values.  To accomodate such dividers,
      clock rates and dividers are generally maintained by the code in
      "scaled" form, which allows integer and fractional dividers to
      be handled in a uniform way.
      
      If present, the gate for a Kona peripheral clock must be enabled
      when a change is made to its multiplexor or one of its dividers.
      Additionally, dividers and multiplexors have trigger registers which
      must be used whenever the divider value or selected parent clock is
      changed.  The same trigger is often used for a divider and
      multiplexor, and a BCM281xx peripheral clock occasionally has two
      triggers.
      
      The gate, dividers, and parent clock selector are treated in this
      code as "components" of a peripheral clock.  Their functionality is
      implemented directly--e.g. the common clock framework gate
      implementation is not used for a Kona peripheral clock gate.  (This
      has being considered though, and the intention is to evolve this
      code to leverage common code as much as possible.)
      
      The source code is divided into three general portions:
      
          drivers/clk/bcm/clk-kona.h
          drivers/clk/bcm/clk-kona.c
              These implement the basic Kona clock functionality,
              including the clk_ops methods and various routines to
              manipulate registers and interpret their values.  This
              includes some functions used to set clocks to a desired
              initial state (though this feature is only partially
              implemented here).
      
          drivers/clk/bcm/clk-kona-setup.c
              This contains generic run-time initialization code for
              data structures representing Kona CCUs and clocks.  This
              encapsulates the clock structure initialization that can't
              be done statically.  Note that there is a great deal of
              validity-checking code here, making explicit certain
              assumptions in the code.   This is mostly useful for adding
              new clock definitions and could possibly be disabled for
              production use.
      
          drivers/clk/bcm/clk-bcm281xx.c
              This file defines the specific CCUs used by BCM281XX family
              SoCs, as well as the specific clocks implemented by each.
              It declares a device tree clock match entry for each CCU
              defined.
      
          include/dt-bindings/clock/bcm281xx.h
              This file defines the selector (index) values used to
              identify a particular clock provided by a CCU.  It consists
              entirely of C preprocessor constants, to be used by both the
              C source and device tree source files.
      Signed-off-by: NAlex Elder <elder@linaro.org>
      Reviewed-by: NTim Kryger <tim.kryger@linaro.org>
      Reviewed-by: NMatt Porter <mporter@linaro.org>
      Acked-by: NMike Turquette <mturquette@linaro.org>
      Signed-off-by: NMatt Porter <mporter@linaro.org>
      1f27f152
  7. 17 1月, 2014 1 次提交
  8. 28 12月, 2013 1 次提交
  9. 15 12月, 2013 1 次提交
  10. 08 10月, 2013 2 次提交
  11. 09 8月, 2013 1 次提交
  12. 26 7月, 2013 1 次提交
  13. 20 6月, 2013 1 次提交
  14. 29 5月, 2013 2 次提交
  15. 16 4月, 2013 1 次提交
  16. 13 4月, 2013 1 次提交
  17. 20 3月, 2013 1 次提交
  18. 20 11月, 2012 1 次提交
  19. 30 10月, 2012 2 次提交
  20. 07 9月, 2012 1 次提交
  21. 05 9月, 2012 1 次提交
  22. 25 8月, 2012 1 次提交
    • L
      clk: convert ARM RealView to common clk · f9a6aa43
      Linus Walleij 提交于
      This converts the ARM RealView machine over to using the common
      clock. The approach is similar to the one used for the Integrator,
      and we're reusing the ICST wrapper code.
      
      We have to put the clock intialization in the timer init function
      for the clocks to be available when initializing the timer,
      keeping them in early_init() is too early for the common clk.
      
      Since we now have to go down and compile drivers/clk/versatile
      a CONFIG_COMMON_CLK_VERSATILE symbol has been added so the proper
      code gets compiled into the kernel for either machine. A leftover
      CLK_VERSATILE in the Integrator Kconfig was fixed up to use
      the new symbol as well.
      
      Tested on ARM RealView PB1176.
      
      Cc: Pawel Moll <pawel.moll@arm.com>
      Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      f9a6aa43
  23. 31 7月, 2012 1 次提交
  24. 12 7月, 2012 1 次提交
    • M
      clk: wm831x: Add initial WM831x clock driver · f05259a6
      Mark Brown 提交于
      The WM831x and WM832x series of PMICs contain a flexible clocking
      subsystem intended to provide always on and system core clocks.  It
      features:
      
      - A 32.768kHz crystal oscillator which can optionally be used to pass
        through an externally generated clock.
      - A FLL which can be clocked from either the 32.768kHz oscillator or
        the CLKIN pin.
      - A CLKOUT pin which can bring out either the oscillator or the FLL
        output.
      - The 32.768kHz clock can also optionally be brought out on the GPIO
        pins of the device.
      
      This driver fully supports the 32.768kHz oscillator and CLKOUT.  The FLL
      is supported only in AUTO mode, the full flexibility of the FLL cannot
      currently be used.
      
      Due to a lack of access to systems where the core SoC has been converted
      to use the generic clock API this driver has been compile tested only.
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      f05259a6
  25. 09 5月, 2012 1 次提交
  26. 25 4月, 2012 1 次提交
  27. 19 3月, 2012 1 次提交
    • A
      clk: make CONFIG_COMMON_CLK invisible · 8fb61e33
      Arnd Bergmann 提交于
      All platforms that use the common clk infrastructure should select
      COMMON_CLK from platform code, and on all other platforms, it must
      not be enabled, so there is no point making the option visible to
      users, and when it is visible, we break randconfig builds.
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      8fb61e33
  28. 17 3月, 2012 1 次提交
    • M
      clk: introduce the common clock framework · b2476490
      Mike Turquette 提交于
      The common clock framework defines a common struct clk useful across
      most platforms as well as an implementation of the clk api that drivers
      can use safely for managing clocks.
      
      The net result is consolidation of many different struct clk definitions
      and platform-specific clock framework implementations.
      
      This patch introduces the common struct clk, struct clk_ops and an
      implementation of the well-known clock api in include/clk/clk.h.
      Platforms may define their own hardware-specific clock structure and
      their own clock operation callbacks, so long as it wraps an instance of
      struct clk_hw.
      
      See Documentation/clk.txt for more details.
      
      This patch is based on the work of Jeremy Kerr, which in turn was based
      on the work of Ben Herrenschmidt.
      Signed-off-by: NMike Turquette <mturquette@linaro.org>
      Signed-off-by: NMike Turquette <mturquette@ti.com>
      Reviewed-by: NThomas Gleixner <tglx@linutronix.de>
      Tested-by: NAndrew Lunn <andrew@lunn.ch>
      Reviewed-by: Rob Herring <rob.herring <at> calxeda.com>
      Cc: Russell King <linux@arm.linux.org.uk>
      Cc: Jeremy Kerr <jeremy.kerr@canonical.com>
      Cc: Arnd Bergman <arnd.bergmann@linaro.org>
      Cc: Paul Walmsley <paul@pwsan.com>
      Cc: Shawn Guo <shawn.guo@freescale.com>
      Cc: Sascha Hauer <s.hauer@pengutronix.de>
      Cc: Richard Zhao <richard.zhao@linaro.org>
      Cc: Saravana Kannan <skannan@codeaurora.org>
      Cc: Magnus Damm <magnus.damm@gmail.com>
      Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
      Cc: Linus Walleij <linus.walleij@stericsson.com>
      Cc: Stephen Boyd <sboyd@codeaurora.org>
      Cc: Amit Kucheria <amit.kucheria@linaro.org>
      Cc: Deepak Saxena <dsaxena@linaro.org>
      Cc: Grant Likely <grant.likely@secretlab.ca>
      Signed-off-by: NArnd Bergmann <arnd@arndb.de>
      b2476490
  29. 28 12月, 2011 1 次提交
  30. 20 7月, 2011 1 次提交
  31. 26 11月, 2010 1 次提交