- 29 6月, 2015 8 次提交
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Acked-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Christian König 提交于
Signed-off-by: NChristian König <christian.koenig@amd.com> Reviewed-by: NAlex Deucher <aleander.deucher@amd.com>
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由 Jérôme Glisse 提交于
In order for hibernation to reliably work we need to properly turn off the SDMA block, sadly after numerous attemps i haven't not found proper sequence for clean and full shutdown. So simply reset both SDMA block, this makes hibernation works reliably on sea island GPU family (CI) Hibernation and suspend to ram were tested (several times) on : Bonaire Hawaii Mullins Kaveri Kabini Cc: stable@vger.kernel.org Signed-off-by: NJérôme Glisse <jglisse@redhat.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Jérôme Glisse 提交于
In order for hibernation to reliably work we need to cleanup more thoroughly the compute ring. Hibernation is different from suspend resume as when we resume from hibernation the hardware is first fully initialize by regular kernel then freeze callback happens (which correspond to a suspend inside the radeon kernel driver) and turn off each of the block. It turns out we were not cleanly shutting down the compute ring. This patch fix that. Hibernation and suspend to ram were tested (several times) on : Bonaire Hawaii Mullins Kaveri Kabini Changed since v1: - Factor the ring stop logic into a function taking ring as arg. Cc: stable@vger.kernel.org Signed-off-by: NJérôme Glisse <jglisse@redhat.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ben Goz 提交于
Signed-off-by: NBen Goz <ben.goz@amd.com> Acked-by: NOded Gabbay <oded.gabbay@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Ben Goz 提交于
v2: add missing MTYPE_NONCACHED enum Signed-off-by: NBen Goz <ben.goz@amd.com> Acked-by: NOded Gabbay <oded.gabbay@amd.com> Reviewed-by: NAlex Deucher <alexander.deucher@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Maninder Singh 提交于
Use kzalloc for allocating one thing rather than kcalloc(1... The semantic patch that makes this change is as follows: // <smpl> @@ @@ - kcalloc(1, + kzalloc( ...) // </smpl> Signed-off-by: NManinder Singh <maninder1.s@samsung.com> Reviewed-by: NVaneet Narang <v.narang@samsung.com> Reviewed-by: NChristian König <christian.koenig@amd.com> Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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由 Alex Deucher 提交于
Spotted by Dan Carpenter. This is a slight variant of his fix. Signed-off-by: NAlex Deucher <alexander.deucher@amd.com>
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- 26 6月, 2015 1 次提交
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由 Lukas Wunner 提交于
On the MacBook Pro, power of the gpu is cut by a gmux chip. Sometimes the gpu gets stuck in powersaving mode and refuses to wake up ("Refused to change power state, currently in D3"). Inserting a delay between setting the gpu to D3hot and cutting the power seems to help (most of the time). This issue and its (partial) remediation by the patch was observed with an Nvidia GT650M (NVE7 / GK107). Signed-off-by: NLukas Wunner <lukas@wunner.de> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 25 6月, 2015 1 次提交
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由 Dave Airlie 提交于
I've only seen this once, and I failed to capture the lockdep backtrace, but I did some investigations. If we are calling into the MST layer from EDID probing, we have the mode_config mutex held, if during that EDID probing, the MST hub goes away, then we can get a deadlock where the connector destruction function in the driver tries to retake the mode config mutex. This offloads connector destruction to a workqueue, and avoid the subsequenct lock ordering issue. Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 24 6月, 2015 2 次提交
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由 Daniel Stone 提交于
Now that the interface has been proven by a port of Weston (using all atomic features including TEST_ONLY), remove the module parameter guarding the atomic API from being exposed, and let it run free in the wild. Signed-off-by: NDaniel Stone <daniels@collabora.com> Acked-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Daniel Vetter 提交于
Since there's only one global instance ever we don't need to have anything fancy. Stops a WARNING in the get_unique ioctl that the unique name isn't set. Cc: <stable@vger.kernel.org> # 4.1+ only Reportedy-and-tested-by: NFabio Coatti <fabio.coatti@gmail.com> Cc: Fabio Coatti <fabio.coatti@gmail.com> Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 23 6月, 2015 3 次提交
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由 Dave Airlie 提交于
If we are doing an MST transaction and we've gotten HPD and we lookup the device from the incoming msg, we should take the mgr lock around it, so that mst_primary and mstb->ports are valid. Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Daniel Vetter 提交于
This validates the mst_primary under the lock, and then calls into the check and send function. This makes the code a lot easier to understand the locking rules in. Signed-off-by: NDaniel Vetter <daniel.vetter@intel.com> Reviewed-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Cc: stable@vger.kernel.org Signed-off-by: NDave Airlie <airlied@redhat.com>
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由 Dave Airlie 提交于
This symbol came via exynos-next, but modular builds are broken so just fix it up now. Signed-off-by: NDave Airlie <airlied@redhat.com>
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- 22 6月, 2015 16 次提交
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由 Laurent Pinchart 提交于
The enable field needs to be kept in sync with the mode_blob field. Call drm_atomic_set_mode_prop_for_crtc() instead of setting enable to false in order to dereference the mode blob correctly. v2: - Check the return value of drm_atomic_set_mode_prop_for_crtc() - Drop the num_connectors local variable Signed-off-by: NLaurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Hyungwon Hwang 提交于
On some board, TE GPIO should be configured properly thoughout pinctrl driver as an wakeup interrupt. So this gpio should be configurable in the board's DT, not being requested as a input pin. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
MIC must be initilized by MIPI DSI when it is being bound. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This patch adds support for Exynos5433 mipi dsi. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This patch make the driver to use an array for clock access. The number of clocks are different from the existing MIPI DSI driver and Exynos5433 MIPI DSI driver. So this patch is needed before adding support for Exynos5433 MIPI DSI driver. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
Exynos MIPI DSI driver uses some static values such as address offsets, register setting values, and etc. This patch makes the driver get those values from the driver data. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This patch adds macros for register writing/reading. This is needed for adding support Exynos5433 MIPI DSI driver, not by using if statement, but by using driver data. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This patch renames pll_clk to sclk_clk. The clock referenced by pll_clk is actually not the pll input clock for dsi. The pll input clock comes from the board's oscillator directly. But for the backward compatibility, the old clock name "pll_clk" is also OK. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
MIC(Mobile image compressor) is newly added IP in Exynos5433. MIC resides between decon and mipi dsim, and compresses frame data by 50%. With dsi, not display port, to send frame data to the panel, the bandwidth is not enough. That is why this compressor is introduced. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
When there are multiple ports or multiple endpoints in a port, they have to be distinguished by the value of reg property. It is common. The drivers can get the specific endpoint in the specific port via this function. Now the drivers have to implement this code in themselves or have to force the order of dt nodes to get the right node. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Acked-by: NRob Herring <robh+dt@kernel.org> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Joonyoung Shim 提交于
DECON(Display and Enhancement Controller) is new IP replacing FIMD in Exynos5433. This patch adds Exynos5433 decon driver. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This patch is a preparation patch for adding support for Exynos5433 DECON. Exynos7 DECON have to be distinguished from Exynos5433 DECON. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
Every CRTC drivers in Exynos DRM implements the code which checks whether IOMMU is supported or not, and if supported enable it. Making new helper for it generalize each CRTC drivers. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
Without this dependency, Kbuild is confused and the configs below them are not placed under Exynos DRM. This patch fixes it, so the configs below them become to be placed under Exynos DRM. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Hyungwon Hwang 提交于
This dependency is a historical thing. It is added when this DP driver is under media subsystem. Now because it is under Exynos DRM, this dependency is not needed anymore. Signed-off-by: NHyungwon Hwang <human.hwang@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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Silence the following -Wmaybe-uninitialized warnings and make the code more clear. drivers/gpu/drm/i915/intel_display.c: In function ‘__intel_set_mode’: drivers/gpu/drm/i915/intel_display.c:11844:14: warning: ‘crtc_state’ may be used uninitialized in this function [-Wmaybe-uninitialized] return state->mode_changed || state->active_changed; ^ drivers/gpu/drm/i915/intel_display.c:11854:25: note: ‘crtc_state’ was declared here struct drm_crtc_state *crtc_state; ^ drivers/gpu/drm/i915/intel_display.c:11868:6: warning: ‘crtc’ may be used uninitialized in this function [-Wmaybe-uninitialized] if (crtc != intel_encoder->base.crtc) ^ drivers/gpu/drm/i915/intel_display.c:11853:19: note: ‘crtc’ was declared here struct drm_crtc *crtc; Reported-by: NChris Wilson <chris@chris-wilson.co.uk> Suggested-by: NChris Wilson <chris@chris-wilson.co.uk> Signed-off-by: NAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: NJani Nikula <jani.nikula@intel.com>
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- 19 6月, 2015 9 次提交
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由 Daniel Thompson 提交于
gem_prime_map is not currently described in the DRM manual, lets document it. Signed-off-by: NDaniel Thompson <daniel.thompson@linaro.org> Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
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由 Inki Dae 提交于
This patch resolves the issue that refresh rate got low at extension mode test with fimd and vidi combination. The problem was because atomic_commit callback waited for the completion of vblank to gaurantee crtc relevant registers are updated from shadow registers to real ones. However, the waiting there is really unnecessary because page flip operation does already it. Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Krzysztof Kozlowski 提交于
The field 'vma' of 'exynos_drm_gem_obj' structure was introduced in 2a3098ff ("drm/exynos: add userptr feature for g2d module") but is not referenced anywhere. One instance of 'exynos_drm_gem_obj' may be mapped to multiple user-space VMAs so 'vma' field does not look useful anyway. Signed-off-by: NKrzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Inki Dae 提交于
This patch resolves page fault issue with iommu and atomic feature when modetest test application is terminated. ENWIN_F field of WINCONx register enables or disable a dma channel to each hardware overlay - the value of the field will be updated to real register after vsync. So this patch makes sure the dma channel is disabled by waiting for vsync one time after clearing shadow registers to all dma channels. Below shows the page fault issue: setting mode 720x1280-60Hz@XR24 on connectors 31, crtc 29 freq: 59.99Hz [ 34.831025] PAGE FAULT occurred at 0x20400000 by 11e20000.sysmmu(Page table base: 0x6e324000) [ 34.838072] Lv1 entry: 0x6e92dc01 [ 34.841489] ------------[ cut here ]------------ [ 34.846058] kernel BUG at drivers/iommu/exynos-iommu.c:364! [ 34.851614] Internal error: Oops - BUG: 0 [#1] PREEMPT SMP ARM [ 34.857428] Modules linked in: <--snip--> [ 35.210894] [<c02880d0>] (exynos_sysmmu_irq) from [<c00608f8>] (handle_irq_event_percpu+0x78/0x134) [ 35.219914] [<c00608f8>] (handle_irq_event_percpu) from [<c00609f0>] (handle_irq_event+0x3c/0x5c) [ 35.228768] [<c00609f0>] (handle_irq_event) from [<c0063698>] (handle_level_irq+0xc4/0x13c) [ 35.237101] [<c0063698>] (handle_level_irq) from [<c005ff7c>] (generic_handle_irq+0x2c/0x3c) [ 35.245521] [<c005ff7c>] (generic_handle_irq) from [<c02214ec>] (combiner_handle_cascade_irq+0x94/0x100) [ 35.254980] [<c02214ec>] (combiner_handle_cascade_irq) from [<c005ff7c>] (generic_handle_irq+0x2c/0x3c) [ 35.264353] [<c005ff7c>] (generic_handle_irq) from [<c0060248>] (__handle_domain_irq+0x7c/0xec) [ 35.273034] [<c0060248>] (__handle_domain_irq) from [<c0009434>] (gic_handle_irq+0x30/0x68) [ 35.281366] [<c0009434>] (gic_handle_irq) from [<c0012ec0>] (__irq_svc+0x40/0x74) Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
DRM Exynos driver is relying on dma-mapping internal structures when used with IOMMU enabled. This patch partially hides dma-mapping internal things by using proper get_dma_ops/set_dma_ops calls. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
This patch adds code, which detach sub-device nodes from default iommu domain if such has been configured. This lets Exynos DRM driver to properly attach sub-devices to its own, common for all sub-devices domain. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Marek Szyprowski 提交于
One should not do any assumptions on the stare of the fimd hardware during driver initialization, so to properly reset fimd before enabling IOMMU, one should ensure that all power domains and clocks are really enabled. This patch adds pm_runtime and clocks management in the fimd_clear_channel() function to ensure that any access to fimd registers will be performed with clocks and power domains enabled. Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com> Tested-by: NJavier Martinez Canillas <javier.martinez@collabora.co.uk> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Joonyoung Shim 提交于
When the fimd is disabled by fimd_disable(), enabled overlay layers also are disabled. If clocks for fimd are enabled by fimd_enable() on this case, it can lead IOMMU page fault. The reason is that VIDCON0_ENVID and VIDCON0_ENVID_F bits of VIDCON0 register are set still even though fimd is disabled, so it may continue display output of prior when clocks for fimd are enabled again. Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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由 Joonyoung Shim 提交于
With atomic modesetting all the control for CRTC, Planes, Encoders and Connectors should come from DRM core, so the driver is not allowed to enable or disable planes from inside the crtc_enable()/disable() call. But it needs to disable planes with crtc_disable in exynos driver internally. Because crtc is disabled before plane is disabled, it means plane_disable just returns without any register changes, then we cannot be sure setting register to disable plane when crtc is disable. This patch removes this chainned calls to enable plane from exynos hw drivers code letting only DRM core touch planes except to disable plane. Also it leads eliminable enabled and resume of struct exynos_drm_plane. Signed-off-by: NGustavo Padovan <gustavo.padovan@collabora.co.uk> Signed-off-by: NJoonyoung Shim <jy0922.shim@samsung.com> Tested-by: NMarek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: NInki Dae <inki.dae@samsung.com>
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