1. 18 11月, 2008 1 次提交
    • V
      x86: add rdtsc barrier to TSC sync check · 93ce99e8
      Venki Pallipadi 提交于
      Impact: fix incorrectly marked unstable TSC clock
      
      Patch (commit 0d12cdd5 "sched: improve sched_clock() performance") has
      a regression on one of the test systems here.
      
      With the patch, I see:
      
       checking TSC synchronization [CPU#0 -> CPU#1]:
       Measured 28 cycles TSC warp between CPUs, turning off TSC clock.
       Marking TSC unstable due to check_tsc_sync_source failed
      
      Whereas, without the patch syncs pass fine on all CPUs:
      
       checking TSC synchronization [CPU#0 -> CPU#1]: passed.
      
      Due to this, TSC is marked unstable, when it is not actually unstable.
      This is because syncs in check_tsc_wrap() goes away due to this commit.
      
      As per the discussion on this thread, correct way to fix this is to add
      explicit syncs as below?
      Signed-off-by: NVenkatesh Pallipadi <venkatesh.pallipadi@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      93ce99e8
  2. 16 11月, 2008 2 次提交
    • Y
      x86: fix es7000 compiling · d3c6aa1e
      Yinghai Lu 提交于
      Impact: fix es7000 build
      
        CC      arch/x86/kernel/es7000_32.o
      arch/x86/kernel/es7000_32.c: In function find_unisys_acpi_oem_table:
      arch/x86/kernel/es7000_32.c:255: error: implicit declaration of function acpi_get_table_with_size
      arch/x86/kernel/es7000_32.c:261: error: implicit declaration of function early_acpi_os_unmap_memory
      arch/x86/kernel/es7000_32.c: In function unmap_unisys_acpi_oem_table:
      arch/x86/kernel/es7000_32.c:277: error: implicit declaration of function __acpi_unmap_table
      make[1]: *** [arch/x86/kernel/es7000_32.o] Error 1
      
      we applied one patch out of order...
      
      | commit a73aaedd
      | Author: Yinghai Lu <yhlu.kernel@gmail.com>
      | Date:   Sun Sep 14 02:33:14 2008 -0700
      |
      |    x86: check dsdt before find oem table for es7000, v2
      |
      |    v2: use __acpi_unmap_table()
      
      that patch need:
      
      	x86: use early_ioremap in __acpi_map_table
      	x86: always explicitly map acpi memory
      	acpi: remove final __acpi_map_table mapping before setting acpi_gbl_permanent_mmap
      	acpi/x86: introduce __apci_map_table, v4
      
      submitted to the ACPI tree but not upstream yet.
      
      fix it until those patches applied, need to revert this one
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d3c6aa1e
    • M
      x86, bts: fix unlock problem in ds.c · d1f1e9c0
      Markus Metzger 提交于
      Fix a problem where ds_request() returned an error without releasing the
      ds lock.
      Reported-by: NStephane Eranian <eranian@gmail.com>
      Signed-off-by: NMarkus Metzger <markus.t.metzger@gmail.com>
      Cc: <stable@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d1f1e9c0
  3. 11 11月, 2008 1 次提交
  4. 10 11月, 2008 1 次提交
  5. 09 11月, 2008 1 次提交
    • I
      sched: optimize sched_clock() a bit · 7cbaef9c
      Ingo Molnar 提交于
      sched_clock() uses cycles_2_ns() needlessly - which is an irq-disabling
      variant of __cycles_2_ns().
      
      Most of the time sched_clock() is called with irqs disabled already.
      The few places that call it with irqs enabled need to be updated.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7cbaef9c
  6. 08 11月, 2008 3 次提交
  7. 07 11月, 2008 7 次提交
  8. 06 11月, 2008 9 次提交
    • E
      Revert "x86: default to reboot via ACPI" · 8d00450d
      Eduardo Habkost 提交于
      This reverts commit c7ffa6c2.
      
      the assumptio of this change was that this would not break
      any existing machine. Andrey Borzenkov reported troubles with
      the ACPI reboot method: the system would hang on reboot, necessiating
      a power cycle. Probably more systems are affected as well.
      
      Also, there are patches queued up for v2.6.29 to disable virtualization
      on emergency_restart() - which was the original motivation of
      this change.
      Reported-by: NAndrey Borzenkov <arvidjaar@mail.ru>
      Bisected-by: NAndrey Borzenkov <arvidjaar@mail.ru>
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      Acked-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      8d00450d
    • H
      x86: align DirectMap in /proc/meminfo · b9c3bfc2
      Hugh Dickins 提交于
      Impact: right-align /proc/meminfo consistent with other fields
      
      When the split-LRU patches added Inactive(anon) and Inactive(file) lines
      to /proc/meminfo, all counts were moved two columns rightwards to fit in.
      Now move x86's DirectMap lines two columns rightwards to line up.
      Signed-off-by: NHugh Dickins <hugh@veritas.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b9c3bfc2
    • J
      AMD IOMMU: fix lazy IO/TLB flushing in unmap path · 80be308d
      Joerg Roedel 提交于
      Lazy flushing needs to take care of the unmap path too which is not yet
      implemented and leads to stale IO/TLB entries. This is fixed by this
      patch.
      Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
      80be308d
    • S
      x86: add smp_mb() before sending INVALIDATE_TLB_VECTOR · d6f0f39b
      Suresh Siddha 提交于
      Impact: fix rare x2apic hang
      
      On x86, x2apic mode accesses for sending IPI's don't have serializing
      semantics. If the IPI receivner refers(in lock-free fashion) to some
      memory setup by the sender, the need for smp_mb() before sending the
      IPI becomes critical in x2apic mode.
      
      Add the smp_mb() in native_flush_tlb_others() before sending the IPI.
      Signed-off-by: NSuresh Siddha <suresh.b.siddha@intel.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      d6f0f39b
    • Y
      x86: remove VISWS and PARAVIRT around NR_IRQS puzzle · 7db282fa
      Yinghai Lu 提交于
      Impact: fix warning message when PARAVIRT is set in config
      
      Remove stale #ifdef components from our IRQ sizing logic.
      x86/Voyager is the only holdout.
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      7db282fa
    • B
      x86: mention ACPI in top-level Kconfig menu · da85f865
      Bjorn Helgaas 提交于
      Impact: clarify menuconfig text
      
      Mention ACPI in the top-level menu to give a clue as to where
      it lives. This matches what ia64 does.
      Signed-off-by: NBjorn Helgaas <bjorn.helgaas@hp.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      da85f865
    • Y
      x86: size NR_IRQS on 32-bit systems the same way as 64-bit · 1b489768
      Yinghai Lu 提交于
      Impact: make NR_IRQS big enough for system with lots of apic/pins
      
      If lots of IO_APIC's are there (or can be there), size the same way
      as 64-bit, depending on MAX_IO_APICS and NR_CPUS.
      
      This fixes the boot problem reported by Ben Hutchings on a 32-bit
      server with 5 IO-APICs and 240 IO-APIC pins.
      Signed-off-by: NYinghai <yinghai@kernel.org>
      Tested-by: NBen Hutchings <bhutchings@solarflare.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      1b489768
    • B
      x86: don't allow nr_irqs > NR_IRQS · c78d0cf2
      Ben Hutchings 提交于
      Impact: fix boot hang on 32-bit systems with more than 224 IO-APIC pins
      
      On some 32-bit systems with a lot of IO-APICs probe_nr_irqs() can
      return a value larger than NR_IRQS. This will lead to probe_irq_on()
      overrunning the irq_desc array.
      
      I hit this when running net-next-2.6 (close to 2.6.28-rc3) on a
      Supermicro dual Xeon system.  NR_IRQS is 224 but probe_nr_irqs() detects
      5 IOAPICs and returns 240.  Here are the log messages:
      
      Tue Nov  4 16:53:47 2008 ACPI: IOAPIC (id[0x01] address[0xfec00000] gsi_base[0])
      Tue Nov  4 16:53:47 2008 IOAPIC[0]: apic_id 1, version 32, address 0xfec00000, GSI 0-23
      Tue Nov  4 16:53:47 2008 ACPI: IOAPIC (id[0x02] address[0xfec81000] gsi_base[24])
      Tue Nov  4 16:53:47 2008 IOAPIC[1]: apic_id 2, version 32, address 0xfec81000, GSI 24-47
      Tue Nov  4 16:53:47 2008 ACPI: IOAPIC (id[0x03] address[0xfec81400] gsi_base[48])
      Tue Nov  4 16:53:47 2008 IOAPIC[2]: apic_id 3, version 32, address 0xfec81400, GSI 48-71
      Tue Nov  4 16:53:47 2008 ACPI: IOAPIC (id[0x04] address[0xfec82000] gsi_base[72])
      Tue Nov  4 16:53:47 2008 IOAPIC[3]: apic_id 4, version 32, address 0xfec82000, GSI 72-95
      Tue Nov  4 16:53:47 2008 ACPI: IOAPIC (id[0x05] address[0xfec82400] gsi_base[96])
      Tue Nov  4 16:53:47 2008 IOAPIC[4]: apic_id 5, version 32, address 0xfec82400, GSI 96-119
      Tue Nov  4 16:53:47 2008 ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 2 high edge)
      Tue Nov  4 16:53:47 2008 ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 9 high level)
      Tue Nov  4 16:53:47 2008 Enabling APIC mode:  Flat.  Using 5 I/O APICs
      Signed-off-by: NBen Hutchings <bhutchings@solarflare.com>
      Acked-by: NYinghai Lu <yhlu.kernel@gmail.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      c78d0cf2
    • I
      sched: re-tune balancing · 9fcd18c9
      Ingo Molnar 提交于
      Impact: improve wakeup affinity on NUMA systems, tweak SMP systems
      
      Given the fixes+tweaks to the wakeup-buddy code, re-tweak the domain
      balancing defaults on NUMA and SMP systems.
      
      Turn on SD_WAKE_AFFINE which was off on x86 NUMA - there's no reason
      why we would not want to have wakeup affinity across nodes as well.
      (we already do this in the standard NUMA template.)
      
      lat_ctx on a NUMA box is particularly happy about this change:
      
      before:
      
       |   phoenix:~/l> ./lat_ctx -s 0 2
       |   "size=0k ovr=2.60
       |   2 5.70
      
      after:
      
       |   phoenix:~/l> ./lat_ctx -s 0 2
       |   "size=0k ovr=2.65
       |   2 2.07
      
      a 2.75x speedup.
      
      pipe-test is similarly happy about it too:
      
       |  phoenix:~/sched-tests> ./pipe-test
       |   18.26 usecs/loop.
       |   14.70 usecs/loop.
       |   14.38 usecs/loop.
       |   10.55 usecs/loop.              # +WAKE_AFFINE on domain0+domain1
       |   8.63 usecs/loop.
       |   8.59 usecs/loop.
       |   9.03 usecs/loop.
       |   8.94 usecs/loop.
       |   8.96 usecs/loop.
       |   8.63 usecs/loop.
      
      Also:
      
       - disable SD_BALANCE_NEWIDLE on NUMA and SMP domains (keep it for siblings)
       - enable SD_WAKE_BALANCE on SMP domains
      
      Sysbench+postgresql improves all around the board, quite significantly:
      
                 .28-rc3-11474e2c  .28-rc3-11474e2c-tune
      -------------------------------------------------
          1:             571              688    +17.08%
          2:            1236             1206    -2.55%
          4:            2381             2642    +9.89%
          8:            4958             5164    +3.99%
         16:            9580             9574    -0.07%
         32:            7128             8118    +12.20%
         64:            7342             8266    +11.18%
        128:            7342             8064    +8.95%
        256:            7519             7884    +4.62%
        512:            7350             7731    +4.93%
      -------------------------------------------------
        SUM:           55412            59341    +6.62%
      
      So it's a win both for the runup portion, the peak area and the tail.
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      9fcd18c9
  9. 05 11月, 2008 14 次提交
  10. 04 11月, 2008 1 次提交