Check and configure TX/RX threshold for DWC_usb31. Update dwc3 structure
with new fields to store these threshold configurations.
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

DWC_usb31 periodic transfer at 48K+ bytes per interval may need
modification to the TX/RX packet threshold to achieve optimal result.
Add properties to make it configurable.

By default, periodic ESS TX and RX threshold are not enabled. To enable
TX or RX threshold (host mode only), both packet threshold count and max
burst size properties must be set to a valid non-zero value 1-16.

DWC_usb31 programming guide section 1.2.3 and 1.2.4.

Cc: John Youn <johnyoun@synopsys.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add new GTXTHRCFG bit field macros for DWC_usb31. The GTXTHRCFG register
fields for DWC_usb31 is as follows:
 +-------+--------------------------+-----------------------------------+
 | BITS  | Name                     | Description                       |
 +=======+==========================+===================================+
 | 31:27 | reserved                 |                                   |
 | 26    | UsbTxPktCntSel           | Async ESS transmit packet         |
 |       |                          | threshold enable                  |
 | 25:21 | UsbTxPktCnt              | Async ESS transmit packet         |
 |       |                          | threshold count                   |
 | 20:16 | UsbMaxTxBurstSize        | Async ESS Max transmit burst size |
 | 15    | UsbTxThrNumPktSel_HS_Prd | HS high bandwidth periodic        |
 |       |                          | transmit packet threshold enable  |
 | 14:13 | UsbTxThrNumPkt_HS_Prd    | HS high bandwidth periodic        |
 |       |                          | transmit packet threshold count   |
 | 12:11 | reserved                 |                                   |
 | 10    | UsbTxThrNumPktSel_Prd    | Periodic ESS transmit packet      |
 |       |                          | threshold enable                  |
 | 9:5   | UsbTxThrNumPkt_Prd       | Periodic ESS transmit packet      |
 |       |                          | threshold count                   |
 | 4:0   | UsbMaxTxBurstSize_Prd    | Max periodic ESS TX burst size    |
 +-------+--------------------------+-----------------------------------+
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

DWC_usb31 controller has a different UsbRxPktCnt bit fields from
GRXTHRCFG register. Check for DWC_usb31 IP revision to read the
appropriate value.
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add new GRXTHRCFG bit field macros for DWC_usb31. The GRXTHRCFG register
fields for DWC_usb31 is as follows:
 +-------+--------------------------+----------------------------------+
 | BITS  | Name                     | Description                      |
 +=======+==========================+==================================+
 | 31:27 | reserved                 |                                  |
 | 26    | UsbRxPktCntSel           | Async ESS receive packet         |
 |       |                          | threshold enable                 |
 | 25:21 | UsbRxPktCnt              | Async ESS receive packet         |
 |       |                          | threshold count                  |
 | 20:16 | UsbMaxRxBurstSize        | Async ESS Max receive burst size |
 | 15    | UsbRxThrNumPktSel_HS_Prd | HS high bandwidth periodic       |
 |       |                          | receive packet threshold enable  |
 | 14:13 | UsbRxThrNumPkt_HS_Prd    | HS high bandwidth periodic       |
 |       |                          | receive packet threshold count   |
 | 12:11 | reserved                 |                                  |
 | 10    | UsbRxThrNumPktSel_Prd    | Periodic ESS receive packet      |
 |       |                          | threshold enable                 |
 | 9:5   | UsbRxThrNumPkt_Prd       | Periodic ESS receive packet      |
 |       |                          | threshold count                  |
 | 4:0   | UsbMaxRxBurstSize_Prd    | Max periodic ESS RX burst size   |
 +-------+--------------------------+----------------------------------+
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

DWC_usb31 controller has different GTXFIFOSIZE bit field for TXFDEF.
Check for DWC_usb31 IP revision to read the appropriate bit fields.
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Update two GTXFIFOSIZ bit fields for the DWC_usb31 controller. TXFDEP
is a 15-bit value instead of 16-bit value, and bit 15 is TXFRAMNUM.

The GTXFIFOSIZ register for DWC_usb31 is as follows:
 +-------+-----------+----------------------------------+
 | BITS  | Name      | Description                      |
 +=======+===========+==================================+
 | 31:16 | TXFSTADDR | Transmit FIFOn RAM Start Address |
 | 15    | TXFRAMNUM | Asynchronous/Periodic TXFIFO     |
 | 14:0  | TXFDEP    | TXFIFO Depth                     |
 +-------+-----------+----------------------------------+
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

From DWC_usb31 programming guide section 1.3.2, once DWC3_DCTL_CSFTRST
bit is cleared, we must wait at least 50ms before accessing the PHY
domain (synchronization delay).
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Platform device is allocated before adding resources. Make sure to
properly cleanup on error case.

Cc: <stable@vger.kernel.org>
Fixes: f1c7e710 ("usb: dwc3: convert to pcim_enable_device()")
Signed-off-by: NThinh Nguyen <thinhn@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

If building a kernel without FTRACE but with TRACING, dwc3.ko fails to
link due to missing trace events. Fix this by using the correct
Kconfig symbol on Makefile.
Reported-by: NRandy Dunlap <rdunlap@infradead.org>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

In

	dwc3_request	*r = NULL;
	r = A;

the first assignment has no effect. Remove it.
Signed-off-by: NHeinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Trivial fix to spelling mistake in dev_warn warning message text.
Signed-off-by: NColin Ian King <colin.king@canonical.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

In the following test we get stuck by sleeping forever in _dwc3_set_mode()
after which dual-role switching doesn't work.

On dra7-evm's dual-role port,
- Load g_zero gadget driver and enumerate to host
- suspend to mem
- disconnect USB cable to host and connect otg cable with Pen drive in it.
- resume system
- we sleep indefinitely in _dwc3_set_mode due to.
  dwc3_gadget_exit()->usb_del_gadget_udc()->udc_stop()->
	dwc3_gadget_stop()->wait_event_lock_irq()

To fix this instead of waiting indefinitely with wait_event_lock_irq()
we use wait_event_interruptible_lock_irq_timeout() and print
and error message if there was a timeout.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Declared dwc2_force_mode() function as static, because it was used
only in core.c file, for fixing sparse error.
Acked-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

This patch adds a way to enable an external vbus supply in host mode,
when dwc2 drvvbus signal is not used.

This patch is very similar to the one done in U-Boot dwc2 driver [1]. It
also adds dynamic vbus supply management depending on the role and state
of the core.

[1] https://lists.denx.de/pipermail/u-boot/2017-March/283434.htmlSigned-off-by: NAmelie Delaunay <amelie.delaunay@st.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

If the dr_mode is USB_DR_MODE_OTG, forcing the mode is needed during
driver probe to get the host and device specific HW parameters. Then we
clear the force mode bits so that the core operates in OTG mode.

The force mode bits should not be touched at any other time during the
driver lifetime and they should be preserved whenever the GUSBCFG
register is written to. The force mode bit values will persist across
soft resets of the core.

If the dr_mode is either USB_DR_MODE_HOST or USB_DR_MODE_PERIPHERAL, the
force mode is set just once at probe to configure the core as either a
host or peripheral.

Given the above, we no longer need any other reset delays, force delays,
or any forced modes anywhere else in the driver. So replace all calls to
dwc2_core_reset_and_force_dr_mode() with dwc2_core_reset() and remove
all other unnecessary delays.

Also remove the dwc2_force_mode_if_needed() function since the "if
needed" part is already taken care of by the polling in
dwc2_force_mode().

Finally, remove all other calls to dwc2_clear_force_mode().
Tested-by: NStefan Wahren <stefan.wahren@i2se.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Enable the power down option based on the core capability.
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Affected cases:
ClearPortFeature's
 USB_PORT_FEAT_SUSPEND

SetPortFeature's
 USB_PORT_FEAT_SUSPEND
 USB_PORT_FEAT_RESET
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

The GPWRDN interrupts are those that occur in both Host and
Device mode while core is in hibernated state.

Export dwc2_core_init to be able to use it in GPWRDN_IDSTS
interrupt handler.

Here we have duplicated init functions in host and gadget sides
so I have left things as it was(used corresponing functions for
host and gadget), maybe in the future we'll resolve this problem
and will use dwc2_core_init for both sides.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Do changes to allow entering hibernated state from USB_SUSPEND
interrupt. All code is added under if conditions and mustn't impact
existing functionality.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

These are wrapper functions which are calling device or host
enter/exit hibernation functions.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add host/device hibernation functions which must be wrapped
by core's  dwc2_enter_hibernation()/dwc2_exit_hibernation()
functions.

Make dwc2_backup_global_registers dwc2_restore_global_register
non-static to use them in both host/gadget sides.

Added function names:
dwc2_gadget_enter_hibernation()
dwc2_gadget_exit_hibernation()
dwc2_host_enter_hibernation()
dwc2_host_exit_hibernation()
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add common (host/device) helper functions, which will be called while
exiting from hibernation, from both sides.

dwc2_restore_essential_regs()
dwc2_hib_restore_common()
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Move hptxfsiz to host register's backup/restore functions, not
needed to have it in global register's backup/restore functions.

Add backup for glpmcfg, and read/write for gi2cctl and pcgcctl.
As requires programming guide.

Affected functions:
dwc2_backup_host_registers()
dwc2_restore_host_registers()
dwc2_backup_global_registers()
dwc2_restore_global_registers()
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

It will be set once corresponding set_feature command comes.

True if device is allowed to wake-up host by remote-wakeup
signalling.

This is preparation for remote wake-up support implementation,
it will not be implemented until gadget stack provide interface
for bringing remote wake-up signalling.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Added a flag to indicate that core is in hibernation,
it is used to determine the hibernation state of the core.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add parameter remote_wakeup to dwc2_restore_device_registers()
to be able to restore device registers according to programming
guide for dwc-otg. It says that in case of rem_wakeup DCTL must not
be restored here.

Remove setting of DCTL_PWRONPRGDONE from this function, because it
will be done in function responsible for exiting from hibernation.

WA for enabled EPx's IN and OUT in DDMA mode. On entering to
hibernation wrong value read and saved from DIEPDMAx,
as result BNA interrupt asserted on hibernation exit
by restoring from saved area.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NArtur Petrosyan <arturp@synopsys.com>
Signed-off-by: NMinas Harutyunyan <hminas@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Moved dtxfsiz from dwc2_gregs_backup to dwc2_dregs_backup,
because it is device register.
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add parameter and it's initialization, needed for hibernation.

Reimplement dwc2_set_param_power_down() to support hibernation too.
Now 'power_down' parameter can be initialized with 0, 1 or 2.
0 - No
1 - Partial power down
2 - Hibernation
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

No-op change, only rename.

This code was misnamed originally. It was only responsible for partial
power down and not for hibernation.

Rename core_params->hibernation to core_params->power_down,
dwc2_set_param_hibernation() to dwc2_set_param_power_down().
Signed-off-by: NVardan Mikayelyan <mvardan@synopsys.com>
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Set 'lpm_capable' flag in the gadget structure so
indicating that LPM is supported.
Signed-off-by: NJohn Youn <johnyoun@synopsys.com>
Signed-off-by: NSevak Arakelyan <sevaka@synopsys.com>
Signed-off-by: NGrigor Tovmasyan <tovmasya@synopsys.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

This is useful on platforms (e.g. TI AM437x) that don't
have ID available on a GPIO but do have the OTG block.

We can obtain the ID state via the OTG block and use it
for dual-role switching.
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

This fixes "utmi_phy_clk_enable: timeout waiting for phy to stabilize"
error message.
Signed-off-by: NDmitry Osipenko <digetx@gmail.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

The nop_reset and shutdown methods are called in a context that can sleep,
so use gpiod_set_value_cansleep instead of gpiod_set_value.

If you've connected the reset line to a GPIO expander, you'd get a kernel
"slowpath" warning with gpiod_set_value.
Signed-off-by: NMike Looijmans <mike.looijmans@topic.nl>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

The show() method should use scnprintf() not snprintf() because snprintf()
may returns a value that exceeds its second argument.
Signed-off-by: NJaejoong Kim <climbbb.kim@gmail.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

We don't support PRTCAP == OTG yet, so prevent user from
setting it via debugfs.

Fixes: 41ce1456 ("usb: dwc3: core: make dwc3_set_mode() work properly")
Cc: <stable@vger.kernel.org> # v4.12+
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Add OTG and GHWPARAMS6 register definitions
Signed-off-by: NRoger Quadros <rogerq@ti.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Amlogic Meson GXL and AXG SoCs come with a (host-only) dwc3 USB
controller. To use this controller a clock has to be enabled and a reset
line has to be pulsed.
Enabling the clock works identical to other SoCs. However, the reset
line has to be pulsed (using reset_control_reset) instead of using a
level reset (reset_control_{assert,deassert}).
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: NYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Some SoCs (such as Amlogic Meson GXL for example) share the reset line
with other components (in case of the Meson GXL example there's a shared
reset line between the USB2 PHYs, USB3 PHYs and the dwc3 controller).
Additionally SoC implementations may prefer a reset pulse over level
resets.

For now this falls back to the old defaults, which are:
- reset lines are exclusive
- level resets are being used
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Tested-by: NYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>

Amlogic Meson GX SoCs (GXL and AXG) come with a (host-only) dwc3 USB
controller. This requires a clock to be enabled and a reset line to be
pulsed to get the hardware into a known state.
Add the documentation for this IP block, similar to "qcom,dwc3.txt".
Signed-off-by: NMartin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: NRob Herring <robh@kernel.org>
Tested-by: NYixun Lan <yixun.lan@amlogic.com>
Signed-off-by: NFelipe Balbi <felipe.balbi@linux.intel.com>