1. 23 11月, 2016 1 次提交
  2. 27 9月, 2016 2 次提交
  3. 17 5月, 2016 1 次提交
  4. 09 3月, 2016 1 次提交
  5. 30 9月, 2015 2 次提交
  6. 14 9月, 2015 2 次提交
  7. 03 8月, 2015 1 次提交
    • S
      thermal: consistently use int for temperatures · 17e8351a
      Sascha Hauer 提交于
      The thermal code uses int, long and unsigned long for temperatures
      in different places.
      
      Using an unsigned type limits the thermal framework to positive
      temperatures without need. Also several drivers currently will report
      temperatures near UINT_MAX for temperatures below 0°C. This will probably
      immediately shut the machine down due to overtemperature if started below
      0°C.
      
      'long' is 64bit on several architectures. This is not needed since INT_MAX °mC
      is above the melting point of all known materials.
      
      Consistently use a plain 'int' for temperatures throughout the thermal code and
      the drivers. This only changes the places in the drivers where the temperature
      is passed around as pointer, when drivers internally use another type this is
      not changed.
      Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
      Acked-by: NGeert Uytterhoeven <geert+renesas@glider.be>
      Reviewed-by: NJean Delvare <jdelvare@suse.de>
      Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>
      Reviewed-by: NDarren Hart <dvhart@linux.intel.com>
      Reviewed-by: NHeiko Stuebner <heiko@sntech.de>
      Reviewed-by: NPeter Feuerer <peter@piie.net>
      Cc: Punit Agrawal <punit.agrawal@arm.com>
      Cc: Zhang Rui <rui.zhang@intel.com>
      Cc: Eduardo Valentin <edubezval@gmail.com>
      Cc: linux-pm@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: Jean Delvare <jdelvare@suse.de>
      Cc: Peter Feuerer <peter@piie.net>
      Cc: Heiko Stuebner <heiko@sntech.de>
      Cc: Lukasz Majewski <l.majewski@samsung.com>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: linux-acpi@vger.kernel.org
      Cc: platform-driver-x86@vger.kernel.org
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-omap@vger.kernel.org
      Cc: linux-samsung-soc@vger.kernel.org
      Cc: Guenter Roeck <linux@roeck-us.net>
      Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
      Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
      Cc: Darren Hart <dvhart@infradead.org>
      Cc: lm-sensors@lm-sensors.org
      Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      17e8351a
  8. 09 5月, 2015 2 次提交
    • K
      thermal: ti-soc-thermal: OMAP5: Implement Workaround for Errata i813 · e9a90d04
      Keerthy 提交于
      DESCRIPTION
      
      Spurious Thermal Alert: Talert can happen randomly while the device remains
      under the temperature limit defined for this event to trig. This spurious
      event is caused by a incorrect re-synchronization between clock domains.
      The comparison between configured threshold and current temperature value
      can happen while the value is transitioning (metastable), thus causing
      inappropriate event generation. No spurious event occurs as long as the
      threshold value stays unchanged. Spurious event can be generated while a
      thermal alert threshold is modified in
      CONTROL_BANDGAP_THRESHOLD_MPU/GPU/CORE/DSPEVE/IVA_n.
      
      WORKAROUND
      
      Spurious event generation can be avoided by performing following sequence
      when the threshold is modified:
      1. Mask the hot/cold events at the thermal IP level.
      2. Modify Threshold.
      3. Unmask the hot/cold events at the thermal IP level.
      Signed-off-by: NKeerthy <j-keerthy@ti.com>
      Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      e9a90d04
    • K
      thermal: ti-soc-thermal: dra7: Implement Workaround for Errata i814 · 79010636
      Keerthy 提交于
      Bandgap Temperature read Dtemp can be corrupted
      
      DESCRIPTION
              Read accesses to registers listed below can be corrupted due to
      	incorrect resynchronization between clock domains.
      
              Read access to registers below can be corrupted :
                      • CTRL_CORE_DTEMP_MPU/GPU/CORE/DSPEVE/IVA_n (n = 0 to 4)
              • CTRL_CORE_TEMP_SENSOR_MPU/GPU/CORE/DSPEVE/IVA_n
      
      WORKAROUND
          Multiple reads to CTRL_CORE_TEMP_SENSOR_MPU/GPU/CORE/DSPEVE/IVA[9:0]:
          BGAP_DTEMPMPU/GPU/CORE/DSPEVE/IVA is needed to discard false value and
          read right value:
             1. Perform two successive reads to BGAP_DTEMP bit field.
                     (a) If read1 returns Val1 and read2 returns Val1, then
             	right value is Val1.
                     (b) If read1 returns Val1, read 2 returns Val2, a third
             	read is needed.
             2. Perform third read
                     (a) If read3 returns Val2 then right value is Val2.
                     (b) If read3 returns Val3, then right value is Val3.
      
          The above in gist means if val1 and val2 are the same then we can go
          ahead with that value else we need a third read which will be right
          since synchronization will be complete by then.
      Signed-off-by: NKeerthy <j-keerthy@ti.com>
      Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      79010636
  9. 05 5月, 2015 4 次提交
  10. 25 2月, 2015 2 次提交
  11. 12 12月, 2014 1 次提交
  12. 09 12月, 2014 1 次提交
    • E
      thermal: cpu_cooling: check for the readiness of cpufreq layer · 0f1be51c
      Eduardo Valentin 提交于
      In this patch, the cpu_cooling code checks for the usability of cpufreq
      layer before proceeding with the CPU cooling device registration. The
      main reason is: CPU cooling device is not usable if cpufreq cannot
      switch frequencies.
      
      Similar checks are spread in thermal drivers. Thus, the advantage now
      is to have the check in a single place: cpu cooling device registration.
      For this reason, this patch also updates the existing drivers that
      depend on CPU cooling to simply propagate the error code of the cpu
      cooling registration call. Therefore, in case cpufreq is not ready, the
      thermal drivers will still return -EPROBE_DEFER, in an attempt to try
      again when cpufreq layer gets ready.
      
      Cc: devicetree@vger.kernel.org
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Kukjin Kim <kgene.kim@samsung.com>
      Cc: linux-arm-kernel@lists.infradead.org
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-pm@vger.kernel.org
      Cc: linux-samsung-soc@vger.kernel.org
      Cc: Naveen Krishna Chatradhi <ch.naveen@samsung.com>
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Zhang Rui <rui.zhang@intel.com>
      Acked-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NViresh Kumar <viresh.kumar@linaro.org>
      Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      0f1be51c
  13. 20 11月, 2014 1 次提交
    • E
      thermal: of: improve of-thermal sensor registration API · 2251aef6
      Eduardo Valentin 提交于
      Different drivers request API extensions in of-thermal. For this reason,
      additional callbacks are required to fit the new drivers needs.
      
      The current API implementation expects the registering sensor driver
      to provide a get_temp and get_trend callbacks as function parameters.
      As the amount of callbacks is growing, this patch changes the existing
      implementation to use a .ops field to hold all the of thermal callbacks
      to sensor drivers.
      
      This patch also changes the existing of-thermal users to fit the new
      API design. No functional change is introduced in this patch.
      
      Cc: Alexandre Courbot <gnurou@gmail.com>
      Cc: devicetree@vger.kernel.org
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Guenter Roeck <linux@roeck-us.net>
      Cc: Jean Delvare <jdelvare@suse.de>
      Cc: linux-kernel@vger.kernel.org
      Cc: linux-pm@vger.kernel.org
      Cc: linux-tegra@vger.kernel.org
      Cc: lm-sensors@lm-sensors.org
      Cc: Rob Herring <robh+dt@kernel.org>
      Cc: Stephen Warren <swarren@wwwdotorg.org>
      Cc: Thierry Reding <thierry.reding@gmail.com>
      Cc: Zhang Rui <rui.zhang@intel.com>
      Acked-by: NGuenter Roeck <linux@roeck-us.net>
      Tested-by: NMikko Perttunen <mikko.perttunen@kapsi.fi>
      Reviewed-by: NMikko Perttunen <mikko.perttunen@kapsi.fi>
      Reviewed-by: NAlexandre Courbot <acourbot@nvidia.com>
      Reviewed-by: NLukasz Majewski <l.majewski@samsung.com>
      Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      2251aef6
  14. 01 7月, 2014 1 次提交
  15. 07 5月, 2014 1 次提交
    • P
      thermal: ti-soc-thermal: clk_round_rate() can return a zero upon error · c68789e5
      Paul Walmsley 提交于
      Treat both negative and zero return values from clk_round_rate() as
      errors.  This is needed since subsequent patches will convert
      clk_round_rate()'s return value to be an unsigned type, rather than a
      signed type, since some clock sources can generate rates higher than
      (2^31)-1 Hz.
      
      Eventually, when calling clk_round_rate(), only a return value of zero
      will be considered a error.  All other values will be considered valid
      rates.  The comparison against values less than 0 is kept to preserve
      the correct behavior in the meantime.
      
      This patch also gets rid of a comparison between unsigned and signed
      values; a side-benefit.
      Signed-off-by: NPaul Walmsley <pwalmsley@nvidia.com>
      Cc: Eduardo Valentin <eduardo.valentin@ti.com>
      Cc: Zhang Rui <rui.zhang@intel.com>
      Signed-off-by: NEduardo Valentin <edubezval@gmail.com>
      c68789e5
  16. 08 4月, 2014 1 次提交
  17. 04 12月, 2013 1 次提交
    • E
      thermal: ti-soc-thermal: use thermal DT infrastructure · 26d9cc65
      Eduardo Valentin 提交于
      This patch improves the ti-soc-thermal driver by adding the
      support to build the thermal zones based on DT nodes.
      
      The driver will have two options now to build the thermal
      zones. The first option is the zones originally coded
      in this driver. So, the driver behavior will be same
      if there is no DT node describing the zones. The second
      option, when it is found a DT node with thermal data,
      will used the common infrastructure to build the thermal
      zone and bind its cooling devices.
      
      In case the driver loads thermal data using the legacy
      mode, this driver still adds to the system
      a cpufreq cooling device. Loading the thermal data from
      DT, the driver assumes someone else will add the cpufreq
      cooling device, like the cpufreq driver.
      
      Cc: Zhang Rui <rui.zhang@intel.com>
      Cc: linux-pm@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      26d9cc65
  18. 15 10月, 2013 1 次提交
  19. 29 8月, 2013 3 次提交
  20. 08 7月, 2013 1 次提交
    • E
      thermal: ti-soc-thermal: use standard GPIO DT bindings · 57d16171
      Eduardo Valentin 提交于
      This change updates the ti-soc-thermal driver to use
      standard GPIO DT bindings to read the GPIO number associated
      to thermal shutdown IRQ, in case the device features it.
      
      Previously, the code was using a specific DT bindings.
      As now OMAP supports the standard way to model GPIOs,
      there is no point in having a ti specific binding.
      
      Cc: Zhang Rui <rui.zhang@intel.com>
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: linux-pm@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: devicetree-discuss@lists.ozlabs.org
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      57d16171
  21. 13 6月, 2013 5 次提交
  22. 28 5月, 2013 1 次提交
    • E
      thermal: introduce TI SoC thermal driver · eb982001
      Eduardo Valentin 提交于
      This patch moves the ti-soc-thermal driver out of
      the staging tree to the thermal tree.
      
      Cc: Grant Likely <grant.likely@linaro.org>
      Cc: Rob Herring <rob.herring@calxeda.com>
      Cc: Rob Landley <rob@landley.net>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: Zhang Rui <rui.zhang@intel.com>
      Cc: Eduardo Valentin <eduardo.valentin@ti.com>
      Cc: J Keerthy <j-keerthy@ti.com>
      Cc: Radhesh Fadnis <radhesh.fadnis@ti.com>
      Cc: Cyril Roelandt <tipecaml@gmail.com>
      Cc: devicetree-discuss@lists.ozlabs.org
      Cc: linux-doc@vger.kernel.org
      Cc: linux-kernel@vger.kernel.org
      Cc: devel@driverdev.osuosl.org
      Cc: linux-pm@vger.kernel.org
      Signed-off-by: NEduardo Valentin <eduardo.valentin@ti.com>
      Signed-off-by: NZhang Rui <rui.zhang@intel.com>
      eb982001