1. 23 2月, 2014 1 次提交
  2. 14 1月, 2014 1 次提交
  3. 26 8月, 2013 1 次提交
  4. 06 7月, 2013 1 次提交
    • O
      mmc: esdhc: Fix bug when writing to SDHCI_HOST_CONTROL register · dcaff04d
      Oded Gabbay 提交于
      The P2020 has a non-standard implementation of the SDHCI_HOST_CONTROL
      register. This patch adds a QUIRK in the SDHCI header to signal that
      a host controller has a non-standard SDHCI_HOST_CONTROL register. The
      patch adds a check to the function esdhc_writeb in file
      sdhci-of-esdhc.c, where it checks if the write is done to the
      SDHCI_HOST_CONTROL register and th host has the above mentioned QUIRK,
      then the function simply returns instead of writing to the register.
      The patch also detects if the processor is P2020 (by looking in dev
      tree) and if so, adds the QUIRK to the host->quirk2
      Signed-off-by: NOded Gabbay <ogabbay@advaoptical.com>
      Reviewed-by: NAnton Vorontsov <anton@enomsg.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      dcaff04d
  5. 28 6月, 2013 1 次提交
  6. 27 5月, 2013 1 次提交
  7. 25 2月, 2013 1 次提交
    • K
      mmc: sdhci: enhance preset value function · 52983382
      Kevin Liu 提交于
      4d55c5a1 ("mmc: sdhci: enable preset value after uhs initialization")
      added preset value support and enabled it by default during sd card init.
      
      Below are the enhancements introduced by this patch:
      
      1. In current code, preset value is enabled after setting clock finished,
      which means the clock is manually set by driver firstly and then suddenly
      switched to preset value at this point. So the first setting is useless
      and unnecessary. What's more, the first clock setting may differ from the
      preset one.  The better way is enable preset value just after switch to
      UHS mode so the preset value can take effect immediately. So move preset
      value enable from mmc_sd_init_card to sdhci_set_ios which will be called
      during set timing.
      
      2. In current code, preset value is disabled at the beginning of
      mmc_attach_sd.  It's too late since low freq (400khz) should be set in
      mmc_power_up.  So move preset value disable to sdhci_set_ios which will
      be called during power up.
      
      3. host->clock and ios->drv_type should also be updated according to the
      preset value if it's enabled. Current code missed this.
      
      4. This patch also introduce a quirk to disable preset value in case
      preset value doesn't work.
      
      This patch has been verified on sdhci-pxav3 platform with both preset
      enabled and disabled.
      Signed-off-by: NKevin Liu <kliu5@marvell.com>
      Reviewed-by: NUlf Hansson <ulf.hansson@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      52983382
  8. 07 12月, 2012 2 次提交
    • D
      mmc: sdhci: add quirk for lack of 1.8v support · 6a66180a
      Daniel Drake 提交于
      The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v
      capable, and it truthfully reports so in its capabilities. This
      alternate voltage is used for driving new "UHS-I" SD cards at their
      full speed.
      
      However, what the controller doesn't know is that the motherboard
      physically doesn't have a 1.8v supply available.
      
      Add a quirk so that systems such as this one can override disable
      1.8v support, adding support for UHS-I cards (by running them at
      3.3v).
      
      This avoids a problem where the system would first try to run the
      card at 1.8v, fail, and then not be able to fully reset the card
      to retry at the normal 3.3v voltage.
      
      This is more appropriate than using the MISSING_CAPS quirk, which
      is intended for cases where the SDHCI controller is actually lying
      about its capabilities, and would force us to somehow override both
      caps words from another source.
      Signed-off-by: NDaniel Drake <dsd@laptop.org>
      Reviewed-by: NPhilip Rakity <prakity@nvidia.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      6a66180a
    • L
      mmc: Standardise capability type · 5f1a4dd0
      Lee Jones 提交于
      There are discrepancies with regards to how MMC capabilities
      are carried throughout the subsystem. Let's standardise them
      to eliminate any confusion.
      Signed-off-by: NLee Jones <lee.jones@linaro.org>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      5f1a4dd0
  9. 08 11月, 2012 1 次提交
  10. 05 9月, 2012 1 次提交
  11. 23 7月, 2012 2 次提交
    • A
      mmc: sdhci: Introduce new flag SDHCI_USING_RETUNING_TIMER · 973905fe
      Aaron Lu 提交于
      Add a new flag of SDHCI_USING_RETUNING_TIMER to represent if the host
      is using a retuning timer for the card inserted.
      
      This flag is set when the host does tuning the first time for the card
      and the host's retuning mode is 1. This flag is used afterwards whenever
      needs to decide if the host is currently using a retuning timer.
      
      This flag is cleared when the card is removed in sdhci_reinit.
      
      The set/clear of the flag and the start/stop of the retuning timer is
      associated with the card's init/remove time, so there is no need to
      touch it when the host is to be removed as at that time the card should
      have already been removed.
      Signed-off-by: NAaron Lu <aaron.lu@amd.com>
      Reviewed-by: NGirish K S <girish.shivananjappa@linaro.org>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      973905fe
    • P
      mmc: sdhci: Allow caps[1] to be set via SDHCI_QUIRK_MISSING_CAPS · bd6a8c30
      Philip Rakity 提交于
      Currently only the capability_0 register can be set if
      SDHCI_QUIRK_MISSING_CAPS is defined.  This is a problem when
      the capability_1 register also needs changing.  Use the quirk
      SDHCI_QUIRK_MISSING_CAPS to allow both registers to be set.
      
      Redefining caps[1] is useful when the board design does not
      support 1.8v vccq so UHS modes are not available.  The code that
      calls sdhci_add_host can then detect this condition and adjust
      the caps so the UHS mode will not be attempted on UHS cards.
      Signed-off-by: NPhilip Rakity <prakity@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      bd6a8c30
  12. 06 4月, 2012 2 次提交
  13. 28 3月, 2012 1 次提交
  14. 13 1月, 2012 1 次提交
  15. 12 1月, 2012 1 次提交
  16. 27 10月, 2011 1 次提交
    • A
      mmc: sdhci-pci: add runtime pm support · 66fd8ad5
      Adrian Hunter 提交于
      Ths patch allows runtime PM for sdhci-pci, runtime suspending after
      inactivity of 50ms and ensuring runtime resume before SDHC registers
      are accessed.  During runtime suspend, interrupts are masked.
      The host controller state is restored at runtime resume.
      
      For Medfield, the host controller's card detect mechanism is
      supplanted by an always-on GPIO which provides for card detect wake-up.
      Signed-off-by: NAdrian Hunter <adrian.hunter@intel.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      66fd8ad5
  17. 21 7月, 2011 1 次提交
  18. 26 5月, 2011 2 次提交
  19. 25 5月, 2011 4 次提交
    • A
      mmc: sdhci: add support for retuning mode 1 · cf2b5eea
      Arindam Nath 提交于
      Host Controller v3.00 can support retuning modes 1,2 or 3 depending on
      the bits 46-47 of the Capabilities register. Also, the timer count for
      retuning is indicated by bits 40-43 of the same register. We initialize
      timer_list for retuning the first time we execute tuning procedure. This
      condition is indicated by SDHCI_NEEDS_RETUNING not being set. Since
      retuning mode 1 sets a limit of 4MB on the maximum data length, we set
      max_blk_count appropriately. Once the tuning timer expires, we set
      SDHCI_NEEDS_RETUNING flag, and if the flag is set, we execute tuning
      procedure before sending the next command. We need to restore mmc_request
      structure after executing retuning procedure since host->mrq is used
      inside the procedure to send CMD19. We also disable and re-enable this
      flag during suspend and resume respectively, as per the spec v3.00.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      cf2b5eea
    • A
      mmc: sdhci: add support for programmable clock mode · c3ed3877
      Arindam Nath 提交于
      Host Controller v3.00 supports programmable clock mode as an optional
      feature. The support for this mode is indicated by non-zero value in
      bits 48-55 of the Capabilities register. If supported, the actual
      value of Clock Multiplier is one more than the value provided in the
      bit fields. We only set Clock Generator Select (bit 5) and SDCLK
      Frequency Select (bits 8-15) of the Clock Control register in case
      Preset Value Enable is not set, otherwise these fields are automatically
      set by the Host Controller based on the UHS mode selected. Also, since
      the maximum and minimum clock frequency in this mode can be
      (Base Clock * Clock Mul) and (Base Clock * Clock Mul)/1024 respectively,
      f_max and f_min have been recalculated to reflect this change.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      c3ed3877
    • A
      mmc: sd: add support for tuning during uhs initialization · b513ea25
      Arindam Nath 提交于
      Host Controller needs tuning during initialization to operate SDR50
      and SDR104 UHS-I cards. Whether SDR50 mode actually needs tuning is
      indicated by bit 45 of the Host Controller Capabilities register.
      A new command CMD19 has been defined in the Physical Layer spec
      v3.01 to request the card to send tuning pattern.
      
      We enable Buffer Read Ready interrupt at the very begining of tuning
      procedure, because that is the only interrupt generated by the Host
      Controller during tuning. We program the block size to 64 in the
      Block Size register. We make sure that DMA Enable and Multi Block
      Select in the Transfer Mode register are set to 0 before actually
      sending CMD19. The tuning block is sent by the card to the Host
      Controller using DAT lines, so we set Data Present Select (bit 5) in
      the Command register. The Host Controller is responsible for doing
      the verfication of tuning block sent by the card at the hardware
      level. After sending CMD19, we wait for Buffer Read Ready interrupt.
      In case we don't receive an interrupt after the specified timeout
      value, we fall back on fixed sampling clock by setting Execute
      Tuning (bit 6) and Sampling Clock Select (bit 7) of Host Control2
      register to 0. Before exiting the tuning procedure, we disable Buffer
      Read Ready interrupt and re-enable other interrupts.
      
      Tested by Zhangfei Gao with a Toshiba uhs card and general hs card,
      on mmp2 in SDMA mode.
      Signed-off-by: NArindam Nath <arindam.nath@amd.com>
      Reviewed-by: NPhilip Rakity <prakity@marvell.com>
      Tested-by: NPhilip Rakity <prakity@marvell.com>
      Acked-by: NZhangfei Gao <zhangfei.gao@marvell.com>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      b513ea25
    • T
      mmc: sdhci: Fix read-only detection with JMicron 388 chip · 82b0e23a
      Takashi Iwai 提交于
      On HP laptops with JMicron 388 chip, the write-locked SD card isn't
      detected correctly as read-only in many cases.  This is because the
      PRESENT_STATE register becomes unsable just after plugging, and it
      returns the WRITE_PROTECT bit wrongly at the first read.
      
      This patch fixes the read-only detection by adding a new sdhci quirk
      indicating to check the register more intensively with a relatively
      long delay.
      
      The patch is tested with 2.6.39-rc4 kernel.
      
      Cc: Aries Lee <arieslee@jmicron.com>
      Signed-off-by: NTakashi Iwai <tiwai@suse.de>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      82b0e23a
  20. 09 1月, 2011 2 次提交
  21. 23 10月, 2010 1 次提交
    • G
      mmc: sdhci: split up sdhci.h for sdhci-pltfm users · 1978fda8
      Giuseppe Cavallaro 提交于
      Some platforms based on sdhci-pltfm need to set their own quirks.
      Previously to this patch, the quirks were in drivers/mmc/host/sdhci.h.
      
      This patch splits drivers/mmc/host/sdhci.h into two parts:
      
      * drivers/mmc/host/sdhci.h  includes the HC registers and I/O accessors.
      * include/linux/mmc/sdhci.h includes the sdhci structure and quirks.
      
      Instead of including drivers/mmc/host/sdhci.h, -pltfm drivers should
      now include include/linux/mmc/sdhci.h and include/linux/sdhci-pltfm.h.
      
      This patch avoids adding/changing the calls/flags in the
      sdhci_pltfm_data structure.  It has been tested on STM platforms
      (e.g. STx7106, STx7108, STx5206) where the driver is configured
      and used as shown in the example below:
      
      [snip]
      static int mmc_pad_resources(struct sdhci_host *sdhci)
      {
      	if (!devm_stm_pad_claim(sdhci->mmc->parent,
      				&stx7108_mmc_pad_config,
      				dev_name(sdhci->mmc->parent)))
      		return -ENODEV;
      
      	return 0;
      }
      
      static struct sdhci_pltfm_data stx7108_mmc_platform_data = {
      	.init = mmc_pad_resources,
      	.quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
      };
      
      static struct platform_device stx7108_mmc_device = {
      	.name = "sdhci",
      [snip]
      
      Note: drivers/mmc/host/sdhci.h now also includes linux/mmc/sdhci.h,
      and no modifications should be needed on other sdhci-<XXX> drivers.
      Signed-off-by: NGiuseppe Cavallaro <peppe.cavallaro@st.com>
      Reviewed-by: NWolfram Sang <w.sang@pengutronix.de>
      Signed-off-by: NChris Ball <cjb@laptop.org>
      1978fda8