- 31 10月, 2013 2 次提交
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由 Thierry Reding 提交于
Tegra114 uses a slightly updated version of host1x with an additional syncpoint. Signed-off-by: NThierry Reding <treding@nvidia.com>
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由 Thierry Reding 提交于
This is slightly safer than adding -Idrivers/gpu/host1x to cflags-y. Signed-off-by: NThierry Reding <treding@nvidia.com>
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- 22 4月, 2013 4 次提交
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由 Terje Bergstrom 提交于
Add support for host1x debugging. Adds debugfs entries, and dumps channel state to UART in case of stuck job. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Terje Bergstrom 提交于
Add support for host1x client modules, and host1x channels to submit work to the clients. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Terje Bergstrom 提交于
Add support for sync point interrupts, and sync point wait. Sync point wait used interrupts for unblocking wait. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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由 Terje Bergstrom 提交于
Add host1x, the driver for host1x and its client unit 2D. The Tegra host1x module is the DMA engine for register access to Tegra's graphics- and multimedia-related modules. The modules served by host1x are referred to as clients. host1x includes some other functionality, such as synchronization. Signed-off-by: NArto Merilainen <amerilainen@nvidia.com> Signed-off-by: NTerje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NThierry Reding <thierry.reding@avionic-design.de> Tested-by: NErik Faye-Lund <kusmabite@gmail.com> Signed-off-by: NThierry Reding <thierry.reding@avionic-design.de>
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- 04 4月, 2013 3 次提交
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由 Joseph Lo 提交于
Adding suspend to RAM support for Tegra platform. There are three suspend mode for Tegra. The difference were below. * LP2: CPU voltage off * LP1: CPU voltage off, DRAM in self-refresh * LP0: CPU + Core voltage off, DRAM in self-refresh After this patch, the LP2 suspend mode will be supported. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
The PMC mostly controls the entry and exit of the system from different sleep modes. Different platform or system may have different configurations. The power management configurations of PMC is represented as some properties. The system needs to define the properties when the system supports deep sleep mode (i.e. suspend). Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: devicetree-discuss@lists.ozlabs.org Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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由 Joseph Lo 提交于
The CPU power timer set up function was related to PMC register. Now moving it to PMC driver. And it also help to clean up the PM related code later. The timer was calculated based on the input clock of PMC. In this patch, we also get the clock from DT. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 12 3月, 2013 1 次提交
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由 Joseph Lo 提交于
Adding the power on function for secondary CPUs in PMC driver, this can help us to remove legacy powergate driver and add generic power domain support later. Signed-off-by: NJoseph Lo <josephl@nvidia.com> Signed-off-by: NStephen Warren <swarren@nvidia.com>
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- 07 2月, 2012 1 次提交
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由 Stephen Warren 提交于
This PMC driver is enough to parse the nvidia,invert-interrupt property from device tree, and configure the PMC's to honor that. In the future, this file could expand to centralize all other PMC accesses within the mach-tegra code. Signed-off-by: NStephen Warren <swarren@nvidia.com> Signed-off-by: NOlof Johansson <olof@lixom.net>
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- 21 1月, 2012 1 次提交
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由 Nicolas Pitre 提交于
When this is the only content remaining in mach/system.h then the whole file is removed. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-and-tested-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NDavid Brown <davidb@codeaurora.org> Acked-by: NStephen Warren <swarren@nvidia.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org>
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- 05 1月, 2012 2 次提交
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由 Russell King 提交于
Remove the now empty arch_reset() from all the mach/system.h includes, and remove its callsite. Remove arm_machine_restart() as this function no longer does anything useful. For samsung platforms, remove the include of mach/system-reset.h and plat/system-reset.h from their respective mach/system.h headers as these just define their arch_reset functions. As a result, the s3c2410 and plat-samsung system-reset.h files are no longer referenced, so remove these files entirely. Acked-by: NNicolas Pitre <nico@linaro.org> Acked-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: NJamie Iles <jamie@jamieiles.com> Acked-by: NTony Lindgren <tony@atomide.com> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Hook these platforms restart code into the new restart hook rather than using arch_reset(). Acked-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 10月, 2011 1 次提交
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由 Rob Herring 提交于
This adds basic support for the Calxeda Highbank platform. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Reviewed-by: NJamie Iles <jamie@jamieiles.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org>
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- 23 12月, 2010 1 次提交
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由 Eric Anholt 提交于
The IPS driver is designed to be able to run detached from i915 and just not enable GPU turbo in that case, in order to avoid module dependencies between the two drivers. This means that we don't know what the load order between the two is going to be, and we had previously only supported IPS after (optionally) i915, but not i915 after IPS. If the wrong order was chosen, you'd get no GPU turbo, and something like half the possible graphics performance. Signed-off-by: NEric Anholt <eric@anholt.net> Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk> Cc: stable@kernel.org
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- 10 9月, 2009 1 次提交
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由 Avi Kivity 提交于
Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 02 8月, 2008 1 次提交
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由 Tony Luck 提交于
After moving the the include files there were a few clean-ups: 1) Some files used #include <asm-ia64/xyz.h>, changed to <asm/xyz.h> 2) Some comments alerted maintainers to look at various header files to make matching updates if certain code were to be changed. Updated these comments to use the new include paths. 3) Some header files mentioned their own names in initial comments. Just deleted these self references. Signed-off-by: NTony Luck <tony.luck@intel.com>
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- 27 4月, 2008 1 次提交
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由 Xiantao Zhang 提交于
Three header files are added: asm-ia64/kvm.h asm-ia64/kvm_host.h asm-ia64/kvm_para.h Signed-off-by: NXiantao Zhang <xiantao.zhang@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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