1. 12 3月, 2013 1 次提交
  2. 29 1月, 2013 4 次提交
  3. 17 11月, 2012 1 次提交
    • S
      ARM: tegra: harmony: enable HDMI port · 20ffbd7d
      Stephen Warren 提交于
      Enable host1x, and the HDMI output. Harmony also has an optional LCD,
      and a VGA output. The former isn't enabled due to potential issues with
      having multiple outputs enabled. The latter isn't enabled since the
      driver doesn't support VGA yet anyway.
      
      Correct DDC I2C frequency to 100KHz.
      
      Based on work by Thierry Reding for TrimSlice.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      20ffbd7d
  4. 16 11月, 2012 1 次提交
  5. 06 11月, 2012 1 次提交
  6. 21 9月, 2012 1 次提交
  7. 15 9月, 2012 2 次提交
    • S
      ARM: dt: tegra: harmony: configure power off · be972c32
      Stephen Warren 提交于
      Add DT property to tell the TPS6586x that it should provide the
      pm_power_off() implementation. This allows "shutdown" to work.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      be972c32
    • L
      ARM: dt: tegra: harmony: add regulators · 3cc404de
      Laxman Dewangan 提交于
      Harmony uses a TPS6586x regulator. Instantiate this, and hook up a
      couple of fixed GPIO-controlled regulators too.
      
      Based on Ventana regulator patch by Stephen Warren <swarren@nvidia.com>
      and converted to Harmony.
      
      swarren made the following changes:
      * Added ldo0 regulator configuration to device tree, and updated
        board-harmony-pcie.c for the new regulator name.
      * Fixed vdd_1v05's voltage from 10.5V to 1.05V.
      * Modified board-harmony-pcie.c to obtain the en_vdd_1v05 GPIO number at
        run-time from device tree instead of hard-coding it.
      * Removed board-harmony{-power.c,.h} now that they're unused.
      * Disabled vdd_1v05 regulator; the code in board-harmony-pcie.c hijacks
        this GPIO for now. This will be fixed when the PCIe driver is re-
        written as a driver. The code can't regulator_get("vdd_1v05") right
        now, because the vdd_1v05 regulator's probe gets deferred due to its
        supply being the PMIC, which gets probed after the regulator the first
        time around, and this dependency is only resolved by repeated probing,
        which happens when deferred_probe_initcall() is called, which happens
        in a late initcall, whose runtime order relative to harmony_pcie_init()
        is undefined, since that's also called from a late initcall.
      * Removed unused harmony_pcie_initcall().
      Signed-off-by: NLaxman Dewangan <ldewangan@nvidia.com>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      3cc404de
  8. 21 6月, 2012 1 次提交
    • S
      ARM: dt: tegra: rename board files to match SoC · 702b0e4f
      Stephen Warren 提交于
      Most ARM ${board}.dts files are already named ${soc}-${board}.dts. This
      change modifies the Tegra board files to be named the same way for
      consistency.
      
      Once a related change is made in U-Boot, this will cause both U-Boot and
      the kernel to use the same names for the .dts files and SoC identifiers,
      thus allowing U-Boot's recently added "soc" and "board" environment
      variables to be used to construct the name of Tegra .dtb files, and hence
      allow board-generic U-Boot bootcmd scripts to be written.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      702b0e4f
  9. 12 6月, 2012 1 次提交
  10. 15 5月, 2012 5 次提交
  11. 26 4月, 2012 2 次提交
    • S
      ARM: dt: tegra: pinmux changes for USB ULPI · 563da21b
      Stephen Warren 提交于
      Ensure that the USB ULPI signals are not tri-stated, and have no pull-
      up or pull-down.
      
      Ensure that the pingroup hosting the USB ULPI reset signal (GPIO PV0 or
      PV1 depending on the board, so UAC) is not tri-stated, and has no pull-
      up or pull-down.
      
      This change appears larger than it is due to the grouping and sorting of
      the pin configuration data.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      563da21b
    • S
      ARM: tegra: add USB ULPI PHY reset GPIO to device tree · aa607ebf
      Stephen Warren 提交于
      ULPI PHYs have a reset signal, and different boards use a different GPIO
      for this task. Add a property to device tree to represent this.
      
      I'm not sure if adding this property to the EHCI controller node is
      entirely correct; perhaps eventually we should have explicit separate
      nodes for the various PHYs. However, we don't have that right now, so this
      binding seems like a reasonable choice.
      
      Cc: <devicetree-discuss@lists.ozlabs.org>
      Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
      Cc: <linux-usb@vger.kernel.org>
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      aa607ebf
  12. 19 4月, 2012 1 次提交
  13. 07 2月, 2012 2 次提交
  14. 08 12月, 2011 4 次提交
    • S
      arm/dt: tegra: Fix SDHCI nodes to match board files · 1292c129
      Stephen Warren 提交于
      Mark any SDHCI controllers that aren't registered by the board files as
      disabled in the device-tree files.
      
      In practice, these controllers:
      
      * Have nothing hooked up to them at all, or
      * For ports intended for SDIO usage, the drivers for anything that might
        be attached are not in the device-tree yet. If/when drivers appear, the
        SD/MMC port can be re-enabled.
      
      The only possible exception is TrimSlice's mico SD slot, but that wasn't
      enabled in the board files before anyway, and doesn't work when all the
      SDHCI controllers are enabled anyway.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      1292c129
    • S
      arm/dt: tegra: Fix serial nodes to match board files · 31c1ec92
      Stephen Warren 提交于
      Mark any serial ports that aren't registered by the board files as disabled
      in the device-tree files.
      
      In practice, none of the now-disabled ports ended up succeeding device
      probing because of the missing clock-frequency property. However,
      explicitly marking the devices disabled has the advantage of squashing
      the dev_warn() the failed probe causes, and documenting that we intend
      the port not to be used, rather than accidentally left out the property.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      31c1ec92
    • S
      arm/dt: tegra: Remove /chosen node · 492f204d
      Stephen Warren 提交于
      The command-lines present in the existing /chosen node are not necessarily
      correct for all users. Ideally, we should simply use the command-line
      supplied by the boot-loader.
      
      In fact, using the boot-loader's cmdline is quite easy; either the
      bootloader fully supports DT, in which case it can modify the DT passed
      to the kernel to include its command-line, or CONFIG_APPENDED_DTB can
      be used in conjunction with CONFIG_ARM_ATAG_DTB_COMPAT, and the kernel
      will substitute the bootloader's command-line into the DT.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      492f204d
    • S
      arm/dt: tegra: Remove /memreserve/ from device-tree files · 5a854265
      Stephen Warren 提交于
      There are no drivers in the kernel at present which can make use of the
      memory reserved by /memreserve/, so there is no point reserving it. Remove
      /memreserve/ to allow the user more memory. It's also unclear whether any
      future driver would actually require /memreserve/, or allocate memory
      through some other mechanism.
      Signed-off-by: NStephen Warren <swarren@nvidia.com>
      Signed-off-by: NOlof Johansson <olof@lixom.net>
      5a854265
  15. 22 9月, 2011 1 次提交
  16. 21 9月, 2011 1 次提交
  17. 28 7月, 2011 1 次提交
    • G
      arm/dt: tegra devicetree support · 8e267f3d
      Grant Likely 提交于
      Everything required to populate NVIDIA Tegra devices from the device
      tree.  This patch adds a new DT_MACHINE_DESC() which matches against
      a tegra20 device tree.  So far it only registers the on-chip devices,
      but it will be refined in follow on patches to configure clocks and
      pin IO from the device tree also.
      Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
      8e267f3d