- 23 2月, 2014 1 次提交
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由 Hans de Goede 提交于
This avoids the ugliness of creating a nested platform device from probe. While moving it around anyways, move the mk6q phy init code from probe to imx_sata_enable, as the phy needs to be re-initialized on resume too, otherwise the drive won't be recognized after resume. Tested on a wandboard i.mx6 quad. Signed-off-by: NHans de Goede <hdegoede@redhat.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 12 12月, 2013 1 次提交
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由 Wei Yongjun 提交于
Release alloced resources instead of direct return from imx_ahci_probe() in the error handling case. Fixes: 4a23d179 ('ahci: imx: Add i.MX53 support') Signed-off-by: NWei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: NTejun Heo <tj@kernel.org> Acked-by: NMarek Vasut <marex@denx.de>
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- 03 12月, 2013 4 次提交
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由 Fengguang Wu 提交于
Acked-by: NMarek Vasut <marex@denx.de> Signed-off-by: NFengguang Wu <fengguang.wu@intel.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Marek Vasut 提交于
Add minor adjustments to support i.MX53 SATA port as well as i.MX6Q one. The difference here is mostly the clock which need to be enabled and also the lack of need of programming IOMUXC registers on i.MX53. All of which is well handles in the clock enable/disable functions. Note that this patch also cleans up the names of the common functions, so they don't read imx6q_* but imx_* instead. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Marek Vasut 提交于
The same code for enabling and disabling SATA clock was found in multiple places in the driver. Implement functions that enable/disable the SATA clock and use them in such places instead of duplicating the code. Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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由 Marek Vasut 提交于
We must clear this IMX6Q_GPR13_SATA_MPLL_CLK_EN bit on i.MX6Q, otherwise Linux will fail to find the attached drive on some boards. This entire fix was: Reported-by: NEric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: NMarek Vasut <marex@denx.de> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Cc: Richard Zhu <r65037@freescale.com> Cc: Linux-IDE <linux-ide@vger.kernel.org> Signed-off-by: NTejun Heo <tj@kernel.org> Cc: stable@vger.kernel.org
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- 15 10月, 2013 1 次提交
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由 Richard Zhu 提交于
In order to save power consumption as much as possible. * Disable sata phy internal pll reference clock when sysetem enter into suspend mode, enable it after resume. * Setup module parameter used to enable imx ahci test power down mode(PDDQ) or not, when there is no device detected on the port * minor modifications: - The format of the copyright is changed, because that the original one can't pass fsl internal patch reivew without the character '(c)'. - Exports ahci_platform_ops and ahci_error_handler(). NOTE: * The hot-plug can't be supported when PDDQ mode is ever enabled. * module parameter usage how-to: - default: enable PDDQ mode when no device detected. - add "ahci-imx.hotplug=1" into kernel command line if your don't want to enable PDDQ mode when no device detected on the port. tj: Slightly updated description and comments. Signed-off-by: NRichard Zhu <r65037@freescale.com> Signed-off-by: NTejun Heo <tj@kernel.org>
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- 25 7月, 2013 1 次提交
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由 Richard Zhu 提交于
imx6q contains one Synopsys AHCI SATA controller, But it can't share ahci_platform driver with other controllers because there are some misalignments of the generic AHCI controller - the bits definitions of the HBA registers, the Vendor Specific registers, the AHCI PHY clock and the AHCI signals adjustment window(GPR13 register). - CAP_SSS(bit20) of the HOST_CAP is writable, default value is '0', should be configured to be '1' - bit0 (only one AHCI SATA port on imx6q) of the HOST_PORTS_IMPL should be set to be '1'.(default 0) - One Vendor Specific register HOST_TIMER1MS(offset:0xe0) should be configured regarding to the frequency of AHB bus clock. - Configurations of the AHCI PHY clock, and the signal parameters of the GPR13 Setup its own ahci sata driver, contained the imx6q specific initialized codes, re-use the generic ahci_platform driver, and keep the generic ahci_platform driver clean as much as possible. tj: patch description reformatted Signed-off-by: NRichard Zhu <r65037@freescale.com> Reviewed-by: NShawn Guo <shawn.guo@linaro.org> Signed-off-by: NTejun Heo <tj@kernel.org>
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