Enable AC97 audio device on SMDKV310 and SMDKC210.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define missing controller clocks for the I2S-0, 1 and 2 blocks.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: Added description]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define clock for the AC97 controller.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define PDMA clocks for the controller 0 and 1.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Enable the I2C1 device on SMDKV310 and SMDKC210.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
[kgene.kim@samsung.com: minor changed title]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Define platform devices for all audio devices found on S5PV310
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Samsung's Soc S5PV310 has three PL330 DMACs. First is dedicated for
Memory->Memory data transfer while the other two meant for data
transfer with peripherals.
Define and add latter two PL330 DMACs as platform devices on the
S5PV310 platform.
Signed-off-by: NJassi Brar <jassi.brar@samsung.com>
Acked-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: NLiam Girdwood <lrg@slimlogic.co.uk>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds to support ethernet for SMDKV310 and SMDKC210 board.
  - define smc911x resources
  - define configurations of smc911x platform data
  - define platform device "smsc911x"
  - initialize srom controller for lan9215 chip
Signed-off-by: NDaein Moon <moon9124@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support SROMC for S5PV310 and S5PC210.
Signed-off-by: NDaein Moon <moon9124@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes VMALLOC_END from 0xE0000000 to 0xF6000000, because
some systems want to use more vmalloc()/ioremap() area and now don't use
from at 0xE0000000 to 0xF6000000 (the start of Samsung SoCs' VA space)

Cc: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds EINT(External Interrupt) support on S5PV310 and S5PC210.
All EINTs are transferred to GIC through interrupt combiner.
Signed-off-by: NJongsun Han <jongsun.han@samsung.com>
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds the definition for both IRQs and GPIO registers for
external interrupts.
Signed-off-by: NJongsun Han <jongsun.han@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds L2 cache initialization code in cpu.c of ARCH_S5PV310.
It includes TAG and Data latency, Prefetch, and Power configurations.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Basically, need L2 cache initialize function in ARCH_S5PV310. So it would
be better to move it into ARCH_S5PV310 common part. This patch removes L2
cache initialization code at the each board file.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds GPIOlib support for S5PV310 and S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
[kgene.kim@samsung.com: Fix NR_IRQS]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds initial map for GPIO2 and GPIO3.
S5PV310/S5PC210 has separated GPIO1, GPIO2 and GPIO3.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch updates MAX_COMBINER_NR from 39 to 40 because
S5PV310 need 39th combiner for including EINT16_31.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NSangbeom Kim <sbkim73@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

S5P Samsung SoCs has a EPLL to support various PLL clock sources for other
H/W blocks. Until now, to control EPLL, each of SoCs make their own functions
in 'mach-s5pxxx/clock.c'. But some of functions, 'xxx_epll_get_rate()' and
'xxx_epll_enable()', are exactly same in all S5P SoCs, so this patch move
these duplicated codes to common EPLL functions that use platform wide.
Signed-off-by: NSeungwhan Youn <sw.youn@samsung.com>
Acked-by: NJassi Brar <jassi.brar@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

S5PV310 and S5PC210 support more I2C devices than previous SoCs.
Add the device support code for them.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

S5PV310 and S5PC210 support total 8 (+ 1 dedicated for HDMI) I2C devices.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: NMarek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Camera devices use the I2C0 and Gyro uese the I2C1 on universal board.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fixes]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

OneNAND device support for Universal board.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: minor title fixes]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds clock types into platform data to support
external clock divider instead of internal clock divider.
It is defined that what kinds of clock type is used in machine.
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support HSMMC for S5PV310(SMDKV310) and
S5PC210(SMDKC210).
Signed-off-by: NHyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds initialization HSMMC device information.
And HSMMC platform data like card detect, data bus width
and capability is configured.
Signed-off-by: NHyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support HSMMC for S5PV310 and S5PC210 and
setup for HSMMC host controller and also related GPIO.
At most 4 channel can be used at the same time.
A user can configure SDHCI data bus as 8bit or 4bit.
Signed-off-by: NHyuk Lee <hyuk1.lee@samsung.com>
Signed-off-by: NJeongbae Seo <jeongbae.seo@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

Change the code setting a range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgall_range().
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes the code setting ranges of GPIO pins in mach-s5pv310 using
s3c_gpio_cfgpin() to use the recently introduced s3c_gpio_cfgpin_range().
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The selection PLAT_S5P is selected with plat-s5p/Kconfig.
So remove it form each CPU_S5PXXXX config.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited title]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

In case of S5PV310/S5PC210, it uses the SPARSEMEM as default memory
configuration. So moved to ARCH_S5PV310 config.
Signed-off-by: NKyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited title]
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

The physical address of SYSCON(System Controller) is wrong.
This patch fixs this wrong physical address value from 0x10020000 to 0x10010000.
Signed-off-by: NBoojin Kim <boojin.kim@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

It is reported by Junseok Jung that using clz instruction is
better instead of using for-loop to find the interrupt source.
This patch modifies interrupt source searching code using __ffs().
The __ffs() is implemented using clz instruction.
Suggested-by: NJunseok Jung <jundols.jung@samsung.com>
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support Watchdog Timer for S5PV310 and S5PC210.
Signed-off-by: NJemings Ko <jemings@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds support RTC for S5PV310 and S5PC210.
Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com>
Signed-off-by: NJemings Ko <jemings@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch fixes source clocks of moutcore.
That should be clk_mout_apll instead of clk_sclk_apll.
Signed-off-by: NJaecheol Lee <jc.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch changes the 3rd HSMMC interrupt name for compatibility
from IRQ_MMC to IRQ_HSMMC3.
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds various special clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds video clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds various clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>

This patch adds SDMMC clocks for S5PV310/S5PC210.
Signed-off-by: NJongpill Lee <boyko.lee@samsung.com>
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>